esp-idf

Historia

Mahavir Jain c49dce48eb Merge branch 'fix/esp32s3_ununsed_dcache_as_dram_v5.1' into 'release/v5.1' esp_hw_support: Update the memory ptr location/property checks to include the unused DCACHE added to DRAM (v5.1) See merge request espressif/esp-idf!23303		2023-04-27 22:09:55 +08:00
..
esp32	ulp: added sleep support for lp core	2023-04-27 09:51:41 +08:00
esp32c2	Merge branch 'bugfix/bod_glitch_reset_c6_v5.1' into 'release/v5.1'	2023-04-26 13:09:32 +08:00
esp32c3	Merge branch 'bugfix/bod_glitch_reset_c6_v5.1' into 'release/v5.1'	2023-04-26 13:09:32 +08:00
esp32c6	Merge branch 'feature/support_fosc_calibration_c6_eco1_to_v5.1' into 'release/v5.1'	2023-04-27 20:38:31 +08:00
esp32h2	ieee802154: support driver opensrc	2023-04-27 11:27:57 +08:00
esp32s2	ulp: added sleep support for lp core	2023-04-27 09:51:41 +08:00
esp32s3	Merge branch 'fix/esp32s3_ununsed_dcache_as_dram_v5.1' into 'release/v5.1'	2023-04-27 22:09:55 +08:00
include/soc	ieee802154: support driver opensrc	2023-04-27 11:27:57 +08:00
linux/include/soc	…
CMakeLists.txt	ieee802154: support driver opensrc	2023-04-27 11:27:57 +08:00
Kconfig	…
README.md	…
dport_access_common.c	…
linker.lf	…
lldesc.c	…

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware