esp-idf/components/soc
Darian Leung 2f58060921 TWAI: FIFO overrun handling and errata workarounds
This commit adds handling for FIFO overruns and
adds workarounds for HW errats on the ESP32.

Closes https://github.com/espressif/esp-idf/issues/2519
Closes https://github.com/espressif/esp-idf/issues/4276
2021-03-30 14:17:31 +08:00
..
esp32 Merge branch 'refactor/using_isr_callback_in_timer_example' into 'master' 2021-03-22 06:36:32 +00:00
esp32c3 TWAI: FIFO overrun handling and errata workarounds 2021-03-30 14:17:31 +08:00
esp32s2 TWAI: FIFO overrun handling and errata workarounds 2021-03-30 14:17:31 +08:00
esp32s3 TWAI: FIFO overrun handling and errata workarounds 2021-03-30 14:17:31 +08:00
include/soc Merge branch 'bugfix/fix_coredump_fake_stack_bug' into 'master' 2021-03-24 06:55:42 +00:00
CMakeLists.txt
README.md
component.mk
linker.lf
lldesc.c
memory_layout_utils.c Support ESP32S3 Beta 3 target 2021-03-18 10:24:22 +08:00
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware