esp-idf

Historia

KonstantinKondrashov 46f0313d6b reset_reasons: EFUSE_RST is treated as POWERON_RST ESP32 does not have the EFUSE_RST, the rest chips has this reset reason.		2022-06-09 17:49:03 +08:00
..
esp32	Merge branch 'feature/support_refresh_brownout_v1' into 'master'	2022-06-06 16:27:58 +08:00
esp32c2	Merge branch 'feature/c2_rng_support' into 'master'	2022-06-06 12:38:28 +08:00
esp32c3	reset_reasons: EFUSE_RST is treated as POWERON_RST	2022-06-09 17:49:03 +08:00
esp32h2	Fix soc caps for BT	2022-06-03 21:45:40 +08:00
esp32s2	reset_reasons: EFUSE_RST is treated as POWERON_RST	2022-06-09 17:49:03 +08:00
esp32s3	Merge branch 'feature/support_refresh_brownout_v1' into 'master'	2022-06-06 16:27:58 +08:00
include/soc	dport: Move DPORT workaround to G0	2022-05-31 13:44:18 +08:00
linux/include/soc	build-system: include soc_caps defines into kconfig	2021-12-06 12:37:07 +08:00
CMakeLists.txt	dport: Move DPORT workaround to G0	2022-05-31 13:44:18 +08:00
README.md	…
dport_access_common.c	dport: Move DPORT workaround to G0	2022-05-31 13:44:18 +08:00
linker.lf	…
lldesc.c	…

README.md

`soc`

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware