Laukik Hase 4800e9b3c4 ci: Fix for `ETSTimers arm & disarm run from IRAM` UT ... - For ESP32 | SPIRAM_MALLOC_ALWAYSINTERNAL=0 - Forced `esp_timer_create` to allocate resource from the internal memory - WiFi/BT coexistence will sometimes arm/disarm timers from an ISR where flash may be disabled. This can lead to a cache-based exception as the timer instance will be located in the PSRAM.		2023-08-16 11:13:39 +08:00
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esp_timer.c	ci: Fix for `ETSTimers arm & disarm run from IRAM` UT	2023-08-16 11:13:39 +08:00
esp_timer_impl_frc_legacy.c	esp_timer: Add ESP_TIMER_ISR dispatch method	2021-02-08 19:10:11 +08:00
esp_timer_impl_lac.c	esp_timer: init rtc timer and system timer in early init	2021-11-15 19:38:09 +08:00
esp_timer_impl_systimer.c	esp_timer: init rtc timer and system timer in early init	2021-11-15 19:38:09 +08:00
ets_timer_legacy.c	Updates for riscv support	2020-11-13 07:49:11 +11:00
system_time.c	esp_system: Adds sync of FRC & RTC counters in esp_restart	2021-07-21 10:23:24 +05:00