kopia lustrzana https://github.com/espressif/esp-idf
74 wiersze
2.0 KiB
C
74 wiersze
2.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* SAR related peripherals are interdependent.
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* Related peripherals are:
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* - ADC
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* - PWDET
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*
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* All of above peripherals require SAR to work correctly.
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* As SAR has some registers that will influence above mentioned peripherals.
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* This file gives an abstraction for such registers
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*/
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#pragma once
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#include <stdlib.h>
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#include <stdbool.h>
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#include "soc/soc.h"
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#include "soc/apb_saradc_struct.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define PWDET_LL_SAR_POWER_FORCE_BIT BIT(24)
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#define PWDET_LL_SAR_POWER_CNTL_BIT BIT(23)
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typedef enum {
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SAR_CTRL_LL_POWER_FSM, //SAR power controlled by FSM
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SAR_CTRL_LL_POWER_ON, //SAR power on
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SAR_CTRL_LL_POWER_OFF, //SAR power off
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} sar_ctrl_ll_power_t;
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/*---------------------------------------------------------------
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SAR power control
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---------------------------------------------------------------*/
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/**
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* @brief Set SAR power mode when controlled by PWDET
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*
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* @param[in] mode See `sar_ctrl_ll_power_t`
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*/
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__attribute__((always_inline))
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static inline void sar_ctrl_ll_set_power_mode_from_pwdet(sar_ctrl_ll_power_t mode)
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{
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if (mode == SAR_CTRL_LL_POWER_FSM) {
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REG_CLR_BIT(PWDET_CONF_REG, PWDET_LL_SAR_POWER_FORCE_BIT);
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} else if (mode == SAR_CTRL_LL_POWER_ON) {
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REG_SET_BIT(PWDET_CONF_REG, PWDET_LL_SAR_POWER_FORCE_BIT);
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REG_SET_BIT(PWDET_CONF_REG, PWDET_LL_SAR_POWER_CNTL_BIT);
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} else if (mode == SAR_CTRL_LL_POWER_OFF) {
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REG_SET_BIT(PWDET_CONF_REG, PWDET_LL_SAR_POWER_FORCE_BIT);
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REG_CLR_BIT(PWDET_CONF_REG, PWDET_LL_SAR_POWER_CNTL_BIT);
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}
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}
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/**
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* @brief Set SAR power ctrl source
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*
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* @param[in] force set PWDET as SAR power ctrl source when force is true
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*/
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static inline void sar_ctrl_ll_force_power_ctrl_from_pwdet(bool force)
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{
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APB_SARADC.saradc_ctrl.saradc_saradc2_pwdet_drv = force;
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}
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#ifdef __cplusplus
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}
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#endif
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