kopia lustrzana https://github.com/espressif/esp-idf
72 wiersze
1.9 KiB
C
72 wiersze
1.9 KiB
C
/*
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/soc_caps.h"
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#include "soc/clk_tree_defs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Parallel IO sample edge
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*/
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typedef enum {
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PARLIO_SAMPLE_EDGE_NEG, /*!< Sample data on falling edge of clock */
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PARLIO_SAMPLE_EDGE_POS, /*!< Sample data on rising edge of clock */
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} parlio_sample_edge_t;
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/**
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* @brief Parallel IO bit packing order
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*
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* Data in memory:
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* Byte 0: MSB < B0.7 B0.6 B0.5 B0.4 B0.3 B0.2 B0.1 B0.0 > LSB
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* Byte 1: MSB < B1.7 B1.6 B1.5 B1.4 B1.3 B1.2 B1.1 B1.0 > LSB
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*
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* Output on line (PARLIO_BIT_PACK_ORDER_LSB):
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* Cycle 0 Cycle 1 Cycle 2 ---> time
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* GPIO 0: B0.0 B0.4 B1.0
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* GPIO 1: B0.1 B0.5 B1.1
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* GPIO 2: B0.2 B0.6 B1.2
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* GPIO 3: B0.3 B0.7 B1.3
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*
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* Output on line (PARLIO_BIT_PACK_ORDER_MSB):
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* Cycle 0 Cycle 1 Cycle 2 ---> time
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* GPIO 0: B0.4 B0.0 B1.4
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* GPIO 1: B0.5 B0.1 B1.5
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* GPIO 2: B0.6 B0.2 B1.6
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* GPIO 3: B0.7 B0.3 B1.7
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*/
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typedef enum {
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PARLIO_BIT_PACK_ORDER_LSB, /*!< Bit pack order: LSB */
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PARLIO_BIT_PACK_ORDER_MSB, /*!< Bit pack order: MSB */
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} parlio_bit_pack_order_t;
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#if SOC_PARLIO_SUPPORTED
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/**
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* @brief Parallel IO clock source
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* @note User should select the clock source based on the power and resolution requirement
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*/
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typedef soc_periph_parlio_clk_src_t parlio_clock_source_t;
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/// Maximum data width of TX unit
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#define PARLIO_TX_UNIT_MAX_DATA_WIDTH SOC_PARLIO_TX_UNIT_MAX_DATA_WIDTH
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/// Maximum data width of RX unit
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#define PARLIO_RX_UNIT_MAX_DATA_WIDTH SOC_PARLIO_RX_UNIT_MAX_DATA_WIDTH
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#else
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typedef int parlio_clock_source_t;
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#define PARLIO_TX_UNIT_MAX_DATA_WIDTH 0
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#define PARLIO_RX_UNIT_MAX_DATA_WIDTH 0
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#endif // SOC_PARLIO_SUPPORTED
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#ifdef __cplusplus
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}
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#endif
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