kopia lustrzana https://github.com/espressif/esp-idf
267 wiersze
9.2 KiB
C
267 wiersze
9.2 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdint.h>
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#include "sdkconfig.h"
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#include "esp_err.h"
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#include "esp_log.h"
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#include "spi_flash_defs.h"
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#include "esp_rom_sys.h"
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#include "esp_rom_spiflash.h"
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#include "spi_flash_override.h"
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// TODO: These dependencies will be removed after remove bootloader_flash to G0.IDF-4609
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#include "bootloader_flash_override.h"
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#include "bootloader_flash_priv.h"
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/*******************************************************************************
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* Flash high speed performance mode.
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* HPM: High performance mode.
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* HPF: High performance flag.
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*
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* Different flash chips might have different high performance strategy.
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* 1. Some flash chips send A3H to enable the HPM.
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* 2. Some flash chips write HPF bit in status register.
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* 3. Some flash chips adjust dummy cycles.
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******************************************************************************/
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#if CONFIG_ESPTOOLPY_FLASHFREQ_120M
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#define FLASH_FREQUENCY 120
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_80M
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#define FLASH_FREQUENCY 80
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_40M
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#define FLASH_FREQUENCY 40
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#elif CONFIG_ESPTOOLPY_FLASHFREQ_20M
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#define FLASH_FREQUENCY 20
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#endif
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const static char *HPM_TAG = "flash HPM";
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// TODO: This function will be changed after remove bootloader_flash to G0.IDF-4609
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extern uint32_t bootloader_flash_execute_command_common(
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uint8_t command,
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uint32_t addr_len, uint32_t address,
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uint8_t dummy_len,
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uint8_t mosi_len, uint32_t mosi_data,
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uint8_t miso_len);
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//-----------------For flash chips which enter HPM via command-----------------------//
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/**
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* @brief Probe the chip whether use command to enable HPM mode. Take GD as an example:
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* Some GD send 0xA3 command to enable HPM mode of the flash.
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*/
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static esp_err_t spi_flash_hpm_probe_chip_with_cmd(uint32_t flash_id)
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{
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esp_err_t ret = ESP_OK;
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switch (flash_id) {
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/* The flash listed here should enter the HPM with command 0xA3 */
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case 0xC84016:
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case 0xC84017:
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break;
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default:
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ret = ESP_ERR_NOT_FOUND;
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break;
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}
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return ret;
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}
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static spi_flash_requirement_t spi_flash_hpm_chip_hpm_requirement_check_with_cmd(uint32_t flash_id, uint32_t freq_mhz, int voltage_mv, int temperautre)
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{
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// voltage and temperature are not been used now, to be completed in the future.
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(void)voltage_mv;
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(void)temperautre;
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spi_flash_requirement_t chip_cap = SPI_FLASH_HPM_UNNEEDED;
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switch (flash_id) {
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/* The flash listed here should enter the HPM with command 0xA3 */
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case 0xC84016:
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case 0xC84017:
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if (freq_mhz >= 80) {
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chip_cap = SPI_FLASH_HPM_NEEDED;
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}
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break;
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default:
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chip_cap = SPI_FLASH_HPM_UNNEEDED;
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break;
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}
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return chip_cap;
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}
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/**
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* @brief Send HPMEN command (A3H)
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*/
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static void spi_flash_enable_high_performance_send_cmd(void)
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{
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uint32_t dummy = 24;
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bootloader_flash_execute_command_common(CMD_HPMEN, 0, 0, dummy, 0, 0, 0);
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// Delay for T(HPM) refering to datasheet.
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esp_rom_delay_us(20);
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}
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/**
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* @brief Check whether flash HPM has been enabled. According to flash datasheets, majorities of
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* HPF bit are at bit-5, sr-3. But some are not. Therefore, this function is only used for those
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* HPF bit is at bit-5, sr-3.
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*/
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static esp_err_t spi_flash_high_performance_check_hpf_bit_5(void)
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{
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if((bootloader_read_status_8b_rdsr3() & (1 << 4)) == 0) {
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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//-----------------For flash chips which enter HPM via adjust dummy-----------------------//
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/**
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* @brief Probe the chip whether adjust dummy to enable HPM mode. Take XMC as an example:
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* Adjust dummy bits to enable HPM mode of the flash. If XMC works under 80MHz, the dummy bits
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* might be 6, but when works under 120MHz, the dummy bits might be 10.
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*/
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static esp_err_t spi_flash_hpm_probe_chip_with_dummy(uint32_t flash_id)
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{
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ESP_EARLY_LOGW(HPM_TAG, "Enter HPM by reconfiguring dummy has not been fully tested");
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esp_err_t ret = ESP_OK;
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switch (flash_id) {
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/* The flash listed here should enter the HPM by adjusting dummy cycles */
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case 0x204017:
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break;
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default:
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ret = ESP_ERR_NOT_FOUND;
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break;
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}
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return ret;
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}
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static spi_flash_requirement_t spi_flash_hpm_chip_hpm_requirement_check_with_dummy(uint32_t flash_id, uint32_t freq_mhz, int voltage_mv, int temperautre)
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{
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// voltage and temperature are not been used now, to be completed in the future.
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(void)voltage_mv;
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(void)temperautre;
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spi_flash_requirement_t chip_cap = SPI_FLASH_HPM_UNNEEDED;
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switch (flash_id) {
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/* The flash listed here should enter the HPM with command 0xA3 */
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case 0x204017:
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if (freq_mhz >= 104) {
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chip_cap = SPI_FLASH_HPM_NEEDED;
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}
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break;
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default:
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chip_cap = SPI_FLASH_HPM_UNNEEDED;
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break;
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}
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return chip_cap;
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}
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/**
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* @brief Adjust dummy cycles. This function modifies the Dummy Cycle Bits in SR3.
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* Usually, the bits are at bit-0, bit-1, sr-3 and set DC[1:0]=[1,1].
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*
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* @note Don't forget to adjust dummy configurations for MSPI, you can get the
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* correct dummy from interface `spi_flash_hpm_get_dummy`.
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*/
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static void spi_flash_turn_high_performance_reconfig_dummy(void)
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{
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uint8_t old_status_3 = bootloader_read_status_8b_rdsr3();
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uint8_t new_status = (old_status_3 | 0x03);
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bootloader_execute_flash_command(CMD_WREN, 0, 0, 0);
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bootloader_write_status_8b_wrsr3(new_status);
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esp_rom_spiflash_wait_idle(&g_rom_flashchip);
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}
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/**
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* @brief Check whether HPM has been enabled. This function checks the DC bits
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*/
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static esp_err_t spi_flash_high_performance_check_dummy_sr(void)
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{
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if((bootloader_read_status_8b_rdsr3() & 0x03) == 0) {
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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static void spi_flash_hpm_get_dummy_xmc(spi_flash_hpm_dummy_conf_t *dummy_conf)
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{
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dummy_conf->dio_dummy = 8;
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dummy_conf->dout_dummy = 8;
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dummy_conf->qio_dummy = 10;
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dummy_conf->qout_dummy = 8;
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dummy_conf->fastrd_dummy = 8;
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}
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//-----------------------generic functions-------------------------------------//
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/**
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* @brief Default dummy for almost all flash chips. If your flash does't need to reconfigure dummy,
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* just call this function.
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*/
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void __attribute__((weak)) spi_flash_hpm_get_dummy_generic(spi_flash_hpm_dummy_conf_t *dummy_conf)
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{
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dummy_conf->dio_dummy = 4;
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dummy_conf->dout_dummy = 8;
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dummy_conf->qio_dummy = 6;
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dummy_conf->qout_dummy = 8;
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dummy_conf->fastrd_dummy = 8;
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}
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const spi_flash_hpm_info_t __attribute__((weak)) spi_flash_hpm_enable_list[] = {
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/* vendor, chip_id, freq_threshold, temperature threshold, operation for setting high performance, reading HPF status, get dummy */
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{ "GD", spi_flash_hpm_probe_chip_with_cmd, spi_flash_hpm_chip_hpm_requirement_check_with_cmd, spi_flash_enable_high_performance_send_cmd, spi_flash_high_performance_check_hpf_bit_5, spi_flash_hpm_get_dummy_generic },
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{ "XMC", spi_flash_hpm_probe_chip_with_dummy, spi_flash_hpm_chip_hpm_requirement_check_with_dummy, spi_flash_turn_high_performance_reconfig_dummy, spi_flash_high_performance_check_dummy_sr, spi_flash_hpm_get_dummy_xmc},
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// default: do nothing, but keep the dummy get function. The first item with NULL as its probe will be the fallback.
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{ "NULL", NULL, NULL, NULL, NULL, spi_flash_hpm_get_dummy_generic},
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};
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static const spi_flash_hpm_info_t *chip_hpm = NULL;
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static spi_flash_hpm_dummy_conf_t dummy_conf;
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esp_err_t spi_flash_enable_high_performance_mode(void)
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{
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uint32_t flash_chip_id = g_rom_flashchip.device_id;
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uint32_t flash_freq = FLASH_FREQUENCY;
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// voltage and temperature has not been implemented, just leave an interface here. Complete in the future.
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int voltage = 0;
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int temperature = 0;
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const spi_flash_hpm_info_t *chip = spi_flash_hpm_enable_list;
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esp_err_t ret = ESP_OK;
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while (chip->probe) {
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ret = chip->probe(flash_chip_id);
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if (ret == ESP_OK) {
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break;
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}
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chip++;
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}
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chip_hpm = chip;
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if (ret != ESP_OK) {
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ESP_EARLY_LOGE(HPM_TAG, "Flash high performance mode hasn't been supported");
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return ret;
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}
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if (chip_hpm->chip_hpm_requirement_check(flash_chip_id, flash_freq, voltage, temperature) == SPI_FLASH_HPM_NEEDED) {
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ESP_EARLY_LOGI(HPM_TAG, "Enabling high speed mode for chip %s", chip_hpm->manufacturer);
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chip_hpm->flash_hpm_enable();
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ESP_EARLY_LOGD(HPM_TAG, "Checking whether HPM has been executed");
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if (chip_hpm->flash_hpf_check() != ESP_OK) {
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ESP_EARLY_LOGE(HPM_TAG, "Flash high performance mode hasn't been executed successfully");
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return ESP_FAIL;
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}
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} else if (chip_hpm->chip_hpm_requirement_check(flash_chip_id, flash_freq, voltage, temperature) == SPI_FLASH_HPM_BEYOND_LIMIT) {
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ESP_EARLY_LOGE(HPM_TAG, "Flash does not have the ability to raise to that frequency");
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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const spi_flash_hpm_dummy_conf_t *spi_flash_hpm_get_dummy(void)
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{
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chip_hpm->flash_get_dummy(&dummy_conf);
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return &dummy_conf;
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}
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