kopia lustrzana https://github.com/espressif/esp-idf
9edab21385
Introduce soc component, add source of rtc_clk and rtc_pm libraries This MR adds parts of the RTC library source code (initialization, clock selection functions, sleep functions). WiFi-related power management functions are kept inside the precompiled library. Most of RTC library APIs have been renamed. Default CPU frequency option in Kconfig is set to 160MHz, pending qualification of 240MHz mode at high temperatures. Register header files are moved into the new soc component, which will contain chip-specific header files and low-level non-RTOS-aware APIs (such as rtc_ APIs). Some of the files from ESP32 component were also moved: cpu_util.c, brownout.c, and the corresponding header files. Further refactoring of ESP32 component into more meaningful layers (chip-specific low level functions; chip-specific RTOS aware functions; framework-specific RTOS-related functions) will be done in future MRs. See merge request !633 |
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