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https://github.com/espressif/esp-idf
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409c91bcb9
esp-idf
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components
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soc
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David Cermak
409c91bcb9
removed possible uint16 access to 32bit register, noted fifo use not recommended
2018-07-23 07:57:18 +02:00
..
esp32
removed possible uint16 access to 32bit register, noted fifo use not recommended
2018-07-23 07:57:18 +02:00
include
/soc
Replace all DOS line endings with Unix
2018-07-12 19:10:37 +08:00
test
soc: add source code of rtc_clk, rtc_pm
2017-04-11 15:45:54 +08:00
component.mk
Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.
2017-09-04 12:05:49 +08:00