Angus Gratton 420aef1ffe Updates for riscv support ... * Target components pull in xtensa component directly * Use CPU HAL where applicable * Remove unnecessary xtensa headers * Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no longer signed/unsigned int). Changes come from internal branch commit a6723fc		2020-11-13 07:49:11 +11:00
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esp_core_dump.h	Updates for riscv support	2020-11-13 07:49:11 +11:00