Angus Gratton 420aef1ffe Updates for riscv support ... * Target components pull in xtensa component directly * Use CPU HAL where applicable * Remove unnecessary xtensa headers * Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no longer signed/unsigned int). Changes come from internal branch commit a6723fc		2020-11-13 07:49:11 +11:00
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esp_timer.c	Updates for riscv support	2020-11-13 07:49:11 +11:00
esp_timer_impl_frc_legacy.c	esp_timer: fix CONFIG_PM_USE_RTC_TIMER_REF option usage	2020-09-04 19:19:26 +00:00
esp_timer_impl_lac.c	esp_timer: do init check in timer implementation	2020-09-01 15:01:11 +08:00
esp_timer_impl_systimer.c	soc: updates caps usage	2020-10-17 16:10:17 +08:00
ets_timer_legacy.c	Updates for riscv support	2020-11-13 07:49:11 +11:00