kopia lustrzana https://github.com/espressif/esp-idf
101 wiersze
2.0 KiB
C
101 wiersze
2.0 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <stdbool.h>
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#include "soc/soc_caps.h"
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#include "riscv/csr.h"
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#include "riscv/interrupt.h"
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#include "riscv/rv_utils.h"
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#include "esp_private/interrupt_plic.h"
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#include "hal/interrupt_plic_ll.h"
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void intr_matrix_route(int intr_src, int intr_num)
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{
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assert_valid_rv_int_num(intr_num);
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interrupt_plic_ll_route(intr_src, intr_num);
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}
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uint32_t esprv_get_interrupt_unmask(void)
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{
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if (IS_PRV_M_MODE()) {
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return REG_READ(PLIC_MXINT_ENABLE_REG);
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} else {
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return REG_READ(PLIC_UXINT_ENABLE_REG);
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}
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}
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enum intr_type esprv_int_get_type(int rv_int_num)
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{
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uint32_t intr_type_reg;
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if (IS_PRV_M_MODE()) {
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intr_type_reg = REG_READ(PLIC_MXINT_TYPE_REG);
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} else {
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intr_type_reg = REG_READ(PLIC_UXINT_TYPE_REG);
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}
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return (intr_type_reg & (1 << rv_int_num)) ? INTR_TYPE_EDGE : INTR_TYPE_LEVEL;
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}
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int esprv_int_get_priority(int rv_int_num)
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{
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if (IS_PRV_M_MODE()) {
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return REG_READ(PLIC_MXINT0_PRI_REG + (rv_int_num) * 4);
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} else {
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return REG_READ(PLIC_UXINT0_PRI_REG + (rv_int_num) * 4);
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}
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}
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bool esprv_int_is_vectored(int rv_int_num)
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{
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return true;
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}
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#if CONFIG_SECURE_ENABLE_TEE && !ESP_TEE_BUILD
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DRAM_ATTR esprv_int_mgmt_t esp_tee_intr_sec_srv_cb = NULL;
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void esprv_int_setup_mgmt_cb(void *fptr)
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{
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esp_tee_intr_sec_srv_cb = (esprv_int_mgmt_t)fptr;
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}
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/* NOTE: Overriding ROM-based interrupt configuration symbols */
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void esprv_int_enable(uint32_t unmask)
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{
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rv_utils_intr_enable(unmask);
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}
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void esprv_int_disable(uint32_t mask)
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{
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rv_utils_intr_disable(mask);
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}
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void esprv_int_set_type(int intr_num, enum intr_type type)
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{
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rv_utils_intr_set_type(intr_num, type);
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}
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void esprv_int_set_priority(int rv_int_num, int priority)
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{
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rv_utils_intr_set_priority(rv_int_num, priority);
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}
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void esprv_int_set_threshold(int priority_threshold)
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{
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rv_utils_intr_set_threshold(priority_threshold);
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}
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#endif
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