kopia lustrzana https://github.com/espressif/esp-idf
529 wiersze
19 KiB
C
529 wiersze
19 KiB
C
/*
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* I2S test environment UT_T1_I2S:
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* We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed.
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* connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2)
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* Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function.
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*/
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#include <stdio.h>
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#include <string.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "driver/i2s.h"
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#include "driver/gpio.h"
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#include "hal/gpio_hal.h"
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#include "unity.h"
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#include "math.h"
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#include "esp_rom_gpio.h"
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#if !TEMPORARY_DISABLED_FOR_TARGETS(ESP32S3, ESP32C3)
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#define SAMPLE_RATE (36000)
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#define SAMPLE_BITS (16)
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#define MASTER_BCK_IO 15
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#define SLAVE_BCK_IO 19
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#define SLAVE_WS_IO 26
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#define DATA_IN_IO 21
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#if CONFIG_IDF_TARGET_ESP32
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#define MASTER_WS_IO 25
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#define DATA_OUT_IO 22
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#define ADC1_CHANNEL_4_IO 32
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#elif CONFIG_IDF_TARGET_ESP32S2
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#define MASTER_WS_IO 28
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#define DATA_OUT_IO 20
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#endif
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#define PERCENT_DIFF 0.0001
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#define I2S_TEST_MODE_SLAVE_TO_MAXTER 0
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#define I2S_TEST_MODE_MASTER_TO_SLAVE 1
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#define I2S_TEST_MODE_LOOPBACK 2
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// mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback
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// Since ESP32-S2 has only one I2S, only loop back test can be tested.
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static void i2s_test_io_config(int mode)
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{
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// Connect internal signals using IO matrix.
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_BCK_IO], PIN_FUNC_GPIO);
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_WS_IO], PIN_FUNC_GPIO);
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gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[DATA_OUT_IO], PIN_FUNC_GPIO);
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gpio_set_direction(MASTER_BCK_IO, GPIO_MODE_INPUT_OUTPUT);
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gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT);
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gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT);
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switch (mode) {
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#if SOC_I2S_NUM > 1
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case I2S_TEST_MODE_SLAVE_TO_MAXTER: {
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esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
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}
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break;
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case I2S_TEST_MODE_MASTER_TO_SLAVE: {
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esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0);
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1I_DATA_IN15_IDX, 0);
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}
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break;
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#endif
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case I2S_TEST_MODE_LOOPBACK: {
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esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0O_DATA_OUT23_IDX, 0, 0);
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esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0I_DATA_IN15_IDX, 0);
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}
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break;
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default: {
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TEST_FAIL_MESSAGE("error: mode not supported");
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}
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break;
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}
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}
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/**
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* i2s initialize test
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* 1. i2s_driver_install
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* 2. i2s_set_pin
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*/
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TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]")
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{
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// dac, adc i2s
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i2s_config_t i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 60,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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#if CONFIG_IDF_TARGET_ESP32
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//install and start i2s driver
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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//for internal DAC, this will enable both of the internal channels
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL));
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//stop & destroy i2s driver
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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#endif
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// normal i2s
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i2s_pin_config_t pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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//error param test
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TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG);
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i2s_config.dma_buf_count = 1;
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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i2s_config.dma_buf_count = 129;
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TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG);
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TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
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}
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TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = DATA_IN_IO
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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i2s_test_io_config(I2S_TEST_MODE_LOOPBACK);
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
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size_t i2s_bytes_write = 0;
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size_t bytes_read = 0;
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int length = 0;
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uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
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for(int i=0; i<100; i++) {
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data_wr[i] = i+1;
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}
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int flag=0; // break loop flag
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int end_position = 0;
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// write data to slave
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i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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while(!flag){
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if (length >= 10000 - 500) {
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break;
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}
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i2s_read(I2S_NUM_0, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
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if(bytes_read>0) {
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printf("read data size: %d\n", bytes_read);
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for(int i=length; i<length + bytes_read; i++) {
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if(i2s_read_buff[i] == 100) {
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flag=1;
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end_position = i;
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break;
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}
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}
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}
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length = length + bytes_read;
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}
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// test the read data right or not
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for(int i=end_position-99; i<=end_position; i++) {
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TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
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}
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free(data_wr);
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free(i2s_read_buff);
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i2s_driver_uninstall(I2S_NUM_0);
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}
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#if !DISABLED_FOR_TARGETS(ESP32S2)
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/* ESP32S2 has only single I2S port and hence following test cases are not applicable */
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TEST_CASE("I2S adc test", "[i2s]")
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{
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// init I2S ADC
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i2s_config_t i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX | I2S_MODE_ADC_BUILT_IN,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.intr_alloc_flags = 0,
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.dma_buf_count = 2,
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.dma_buf_len = 1024,
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.use_apll = 0,
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};
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// install and start I2S driver
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i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL);
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// init ADC pad
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i2s_set_adc_mode(ADC_UNIT_1, ADC1_CHANNEL_4);
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// enable adc sampling, ADC_WIDTH_BIT_12, ADC_ATTEN_DB_11 hard-coded in adc_i2s_mode_init
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i2s_adc_enable(I2S_NUM_0);
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// init read buffer
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uint16_t* i2sReadBuffer = (uint16_t*)calloc(1024, sizeof(uint16_t));
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size_t bytesRead;
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for (int loop = 0; loop < 10; loop++) {
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for (int level = 0; level <= 1; level++) {
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if (level == 0) {
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gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLDOWN_ONLY);
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} else {
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gpio_set_pull_mode(ADC1_CHANNEL_4_IO, GPIO_PULLUP_ONLY);
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}
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vTaskDelay(200 / portTICK_RATE_MS);
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// read data from adc, will block until buffer is full
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i2s_read(I2S_NUM_0, (void*)i2sReadBuffer, 1024 * sizeof(uint16_t), &bytesRead, portMAX_DELAY);
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// calc average
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int64_t adcSumValue = 0;
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for (size_t i = 0; i < 1024; i++) {
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adcSumValue += i2sReadBuffer[i] & 0xfff;
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}
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int adcAvgValue = adcSumValue / 1024;
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printf("adc average val: %d\n", adcAvgValue);
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if (level == 0) {
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TEST_ASSERT_LESS_THAN(100, adcAvgValue);
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} else {
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TEST_ASSERT_GREATER_THAN(4000, adcAvgValue);
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}
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}
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}
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i2s_adc_disable(I2S_NUM_0);
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free(i2sReadBuffer);
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i2s_driver_uninstall(I2S_NUM_0);
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}
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TEST_CASE("I2S write and read test(master tx and slave rx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_TX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = DATA_OUT_IO,
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.data_in_num = -1
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 0,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t slave_pin_config = {
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.bck_io_num = SLAVE_BCK_IO,
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.ws_io_num = SLAVE_WS_IO,
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.data_out_num = -1,
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.data_in_num = DATA_IN_IO,
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};
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// slave driver installed and receive data
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
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i2s_test_io_config(I2S_TEST_MODE_MASTER_TO_SLAVE);
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
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size_t i2s_bytes_write = 0;
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size_t bytes_read = 0;
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int length = 0;
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uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000);
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for(int i=0; i<100; i++) {
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data_wr[i] = i+1;
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}
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int flag=0; // break loop flag
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int end_position = 0;
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// write data to slave
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i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
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while(!flag){
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i2s_read(I2S_NUM_1, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY);
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if(bytes_read>0) {
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printf("read data size: %d\n", bytes_read);
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for(int i=length; i<length + bytes_read; i++) {
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if(i2s_read_buff[i] == 100) {
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flag=1;
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end_position = i;
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break;
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}
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}
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}
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length = length + bytes_read;
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}
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// test the readed data right or not
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for(int i=end_position-99; i<=end_position; i++) {
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TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
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}
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free(data_wr);
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free(i2s_read_buff);
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i2s_driver_uninstall(I2S_NUM_0);
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i2s_driver_uninstall(I2S_NUM_1);
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}
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TEST_CASE("I2S write and read test(master rx and slave tx)", "[i2s]")
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{
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// master driver installed and send data
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i2s_config_t master_i2s_config = {
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.mode = I2S_MODE_MASTER | I2S_MODE_RX,
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 1,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t master_pin_config = {
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.bck_io_num = MASTER_BCK_IO,
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.ws_io_num = MASTER_WS_IO,
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.data_out_num = -1,
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.data_in_num = DATA_IN_IO,
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};
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TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
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TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
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i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
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printf("\r\nheap size: %d\n", esp_get_free_heap_size());
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i2s_config_t slave_i2s_config = {
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.mode = I2S_MODE_SLAVE | I2S_MODE_TX, // Only RX
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.sample_rate = SAMPLE_RATE,
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.bits_per_sample = SAMPLE_BITS,
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.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, //2-channels
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.communication_format = I2S_COMM_FORMAT_STAND_I2S,
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.dma_buf_count = 6,
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.dma_buf_len = 100,
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.use_apll = 1,
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.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
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};
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i2s_pin_config_t slave_pin_config = {
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.bck_io_num = SLAVE_BCK_IO,
|
|
.ws_io_num = SLAVE_WS_IO,
|
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.data_out_num = DATA_OUT_IO,
|
|
.data_in_num = -1
|
|
};
|
|
// slave driver installed and receive data
|
|
TEST_ESP_OK(i2s_driver_install(I2S_NUM_1, &slave_i2s_config, 0, NULL));
|
|
TEST_ESP_OK(i2s_set_pin(I2S_NUM_1, &slave_pin_config));
|
|
i2s_test_io_config(I2S_TEST_MODE_SLAVE_TO_MAXTER);
|
|
|
|
uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400);
|
|
size_t i2s_bytes_write = 0;
|
|
size_t bytes_read = 0;
|
|
int length = 0;
|
|
uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*100000);
|
|
|
|
for(int i=0; i<100; i++) {
|
|
data_wr[i] = i+1;
|
|
}
|
|
// slave write data to master
|
|
i2s_write(I2S_NUM_1, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS);
|
|
|
|
int flag=0; // break loop flag
|
|
int end_position = 0;
|
|
// write data to slave
|
|
while(!flag){
|
|
TEST_ESP_OK(i2s_read(I2S_NUM_0, i2s_read_buff + length, 10000-length, &bytes_read, 1000/portMAX_DELAY));
|
|
if(bytes_read > 0) {
|
|
for(int i=length; i<length+bytes_read; i++) {
|
|
if(i2s_read_buff[i] == 100) {
|
|
flag=1;
|
|
end_position = i;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
length = length + bytes_read;
|
|
}
|
|
// test the readed data right or not
|
|
for(int i=end_position-99; i<=end_position; i++) {
|
|
TEST_ASSERT_EQUAL_UINT8((i-end_position+100), *(i2s_read_buff + i));
|
|
}
|
|
free(data_wr);
|
|
free(i2s_read_buff);
|
|
i2s_driver_uninstall(I2S_NUM_0);
|
|
i2s_driver_uninstall(I2S_NUM_1);
|
|
}
|
|
#endif
|
|
|
|
TEST_CASE("I2S memory leaking test", "[i2s]")
|
|
{
|
|
i2s_config_t master_i2s_config = {
|
|
.mode = I2S_MODE_MASTER | I2S_MODE_RX,
|
|
.sample_rate = SAMPLE_RATE,
|
|
.bits_per_sample = SAMPLE_BITS,
|
|
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
|
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
|
.dma_buf_count = 6,
|
|
.dma_buf_len = 100,
|
|
.use_apll = 0,
|
|
.intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 ,
|
|
};
|
|
i2s_pin_config_t master_pin_config = {
|
|
.bck_io_num = MASTER_BCK_IO,
|
|
.ws_io_num = MASTER_WS_IO,
|
|
.data_out_num = -1,
|
|
.data_in_num = DATA_IN_IO
|
|
};
|
|
|
|
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
|
|
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
|
|
i2s_driver_uninstall(I2S_NUM_0);
|
|
int initial_size = esp_get_free_heap_size();
|
|
|
|
for(int i=0; i<100; i++) {
|
|
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL));
|
|
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config));
|
|
i2s_driver_uninstall(I2S_NUM_0);
|
|
TEST_ASSERT(initial_size == esp_get_free_heap_size());
|
|
}
|
|
vTaskDelay(100 / portTICK_PERIOD_MS);
|
|
TEST_ASSERT(initial_size == esp_get_free_heap_size());
|
|
}
|
|
|
|
/*
|
|
* The I2S APLL clock variation test used to test the difference between the different sample rates, different bits per sample
|
|
* and the APLL clock generate for it. The TEST_CASE passes PERCENT_DIFF variation from the provided sample rate in APLL generated clock
|
|
* The percentage difference calculated as (mod((obtained clock rate - desired clock rate)/(desired clock rate))) * 100.
|
|
*/
|
|
TEST_CASE("I2S APLL clock variation test", "[i2s]")
|
|
{
|
|
i2s_pin_config_t pin_config = {
|
|
.bck_io_num = MASTER_BCK_IO,
|
|
.ws_io_num = MASTER_WS_IO,
|
|
.data_out_num = DATA_OUT_IO,
|
|
.data_in_num = -1
|
|
};
|
|
|
|
i2s_config_t i2s_config = {
|
|
.mode = I2S_MODE_MASTER | I2S_MODE_TX,
|
|
.sample_rate = SAMPLE_RATE,
|
|
.bits_per_sample = SAMPLE_BITS,
|
|
.channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT,
|
|
.communication_format = I2S_COMM_FORMAT_STAND_I2S,
|
|
.dma_buf_count = 6,
|
|
.dma_buf_len = 60,
|
|
.use_apll = true,
|
|
.intr_alloc_flags = 0,
|
|
};
|
|
|
|
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
|
|
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
|
|
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
|
|
int initial_size = esp_get_free_heap_size();
|
|
|
|
uint32_t sample_rate_arr[8] = { 10675, 11025, 16000, 22050, 32000, 44100, 48000, 96000 };
|
|
int bits_per_sample_arr[3] = { 16, 24, 32 };
|
|
|
|
for (int i = 0; i < (sizeof(sample_rate_arr)/sizeof(sample_rate_arr[0])); i++) {
|
|
for (int j = 0; j < (sizeof(bits_per_sample_arr)/sizeof(bits_per_sample_arr[0])); j++) {
|
|
i2s_config.sample_rate = sample_rate_arr[i];
|
|
i2s_config.bits_per_sample = bits_per_sample_arr[j];
|
|
|
|
TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL));
|
|
TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config));
|
|
TEST_ASSERT((fabs((i2s_get_clk(I2S_NUM_0) - sample_rate_arr[i]))/(sample_rate_arr[i]))*100 < PERCENT_DIFF);
|
|
TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0));
|
|
TEST_ASSERT(initial_size == esp_get_free_heap_size());
|
|
}
|
|
}
|
|
|
|
vTaskDelay(100 / portTICK_PERIOD_MS);
|
|
TEST_ASSERT(initial_size == esp_get_free_heap_size());
|
|
}
|
|
|
|
#endif
|