esp-idf/components/soc
Martin Vychodil 69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
..
esp32
esp32c3 Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00
esp32s2 Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00
esp32s3
include/soc
CMakeLists.txt
README.md
component.mk
linker.lf
lldesc.c
memory_layout_utils.c
soc_include_legacy_warn.c

README.md

soc

The soc component provides hardware description for targets supported by ESP-IDF.

- `xxx_reg.h`   - defines registers related to the hardware
- `xxx_struct.h` - hardware description in C `struct`
- `xxx_channel.h` - definitions for hardware with multiple channels
- `xxx_caps.h`  - features/capabilities of the hardware
- `xxx_pins.h`  - pin definitions
- `xxx_periph.h/*.c`  - includes all headers related to a peripheral; declaration and definition of IO mapping for that hardware