esp-idf/components/riscv
Martin Vychodil 69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0)
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
2021-01-27 08:44:03 +01:00
..
include Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00
CMakeLists.txt interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
expression_with_stack_riscv.c
expression_with_stack_riscv_asm.S
instruction_decode.c interrupt: filter out reserved int number by decoding risc-v JAL instruction 2021-01-05 15:39:46 +08:00
interrupt.c
linker.lf
stdatomic.c
vectors.S Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 2021-01-27 08:44:03 +01:00