Ivan Grokhotkov 33cb16fd2a esp32: fix cache error interrupt handler ... Cache error interrupt would read DPORT registers, which caused DPORT access protection to kick in. Disable DPORT protection before doing the reads.		2017-09-08 09:59:09 +08:00
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hwcrypto	…
include	fix(intr): always assign the same intr to a same source, disable the source only when all the handlers disabled.	2017-09-06 15:20:01 +08:00
ld	libgcc: Place assembly functions (including __xtensa_libgcc_window_spill) in IRAM	2017-09-07 16:32:05 +10:00
lib@d8119f2d8b	esp32: update wifi lib for a bunch of small feature and bugfix	2017-09-07 11:01:12 +08:00
test	fix(intr): always assign the same intr to a same source, disable the source only when all the handlers disabled.	2017-09-06 15:20:01 +08:00
Kconfig	Add --warn-undefined-variables to MAKEFLAGS	2017-09-05 16:10:46 +10:00
Makefile.projbuild	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
brownout.c	…
cache_err_int.c	esp32: fix cache error interrupt handler	2017-09-08 09:59:09 +08:00
clk.c	…
component.mk	build system: Restore ifdef/ifndef in Makefiles, clean up examples build	2017-09-05 16:11:03 +10:00
core_dump.c	…
cpu_start.c	Merge branch 'feature/pthread_api' into 'master'	2017-09-07 17:49:42 +08:00
crosscore_int.c	…
dport_access.c	esp32: fix cache error interrupt handler	2017-09-08 09:59:09 +08:00
dport_panic_highint_hdl.S	…
esp_timer.c	…
esp_timer.h	…
esp_timer_esp32.c	…
esp_timer_impl.h	…
ets_timer_legacy.c	…
event_default_handlers.c	…
event_loop.c	…
fast_crypto_ops.c	…
freertos_hooks.c	…
gdbstub.c	…
hw_random.c	…
int_wdt.c	…
intr_alloc.c	refactor(intr): remove useless tags in the debug log.	2017-09-06 15:20:04 +08:00
ipc.c	…
lib_printf.c	…
libhal.a	…
libstdcc++-cache-workaround.a	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
panic.c	esp32: Fixes infinite loop caused by exception during core dumping	2017-09-05 11:15:27 +08:00
phy.h	…
phy_init.c	…
phy_init_data.h	…
restore.c	…
sleep_modes.c	deep sleep: don't use protected DPORT access in wake stub	2017-09-01 18:35:42 +08:00
spiram.c	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
spiram_psram.c	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
spiram_psram.h	Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet.	2017-09-04 12:05:49 +08:00
system_api.c	Fix rebooting when PSRAM is active	2017-09-04 19:00:47 +08:00
task_wdt.c	…
wifi_init.c	…