kopia lustrzana https://github.com/espressif/esp-idf
19 wiersze
484 B
C
19 wiersze
484 B
C
/*
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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/* Since riscv does not replace mcause with "pseudo_reason" as it xtensa does
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* PANIC_RSN_* defined with original interrupt numbers to make it work in
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* common code
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*/
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#define PANIC_RSN_INTWDT_CPU0 ETS_INT_WDT_INUM
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//TODO: IDF-7511
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#if SOC_CPU_CORES_NUM > 1
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#define PANIC_RSN_INTWDT_CPU1 ETS_INT_WDT_INUM
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#endif
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#define PANIC_RSN_CACHEERR 3
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