kopia lustrzana https://github.com/espressif/esp-idf
156 wiersze
8.4 KiB
Plaintext
156 wiersze
8.4 KiB
Plaintext
menu "Power Management"
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config PM_ENABLE
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bool "Support for power management"
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# SMP FreeRTOS currently does not support power management IDF-4997
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depends on !FREERTOS_SMP
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default n
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help
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If enabled, application is compiled with support for power management.
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This option has run-time overhead (increased interrupt latency,
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longer time to enter idle state), and it also reduces accuracy of
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RTOS ticks and timers used for timekeeping.
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Enable this option if application uses power management APIs.
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config PM_DFS_INIT_AUTO
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bool "Enable dynamic frequency scaling (DFS) at startup"
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depends on PM_ENABLE
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default n
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help
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If enabled, startup code configures dynamic frequency scaling.
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Max CPU frequency is set to DEFAULT_CPU_FREQ_MHZ setting,
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min frequency is set to XTAL frequency.
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If disabled, DFS will not be active until the application
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configures it using esp_pm_configure function.
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config PM_PROFILING
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bool "Enable profiling counters for PM locks"
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depends on PM_ENABLE
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default n
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help
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If enabled, esp_pm_* functions will keep track of the amount of time
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each of the power management locks has been held, and esp_pm_dump_locks
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function will print this information.
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This feature can be used to analyze which locks are preventing the chip
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from going into a lower power state, and see what time the chip spends
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in each power saving mode. This feature does incur some run-time
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overhead, so should typically be disabled in production builds.
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config PM_TRACE
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bool "Enable debug tracing of PM using GPIOs"
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depends on PM_ENABLE
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default n
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help
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If enabled, some GPIOs will be used to signal events such as RTOS ticks,
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frequency switching, entry/exit from idle state. Refer to pm_trace.c
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file for the list of GPIOs.
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This feature is intended to be used when analyzing/debugging behavior
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of power management implementation, and should be kept disabled in
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applications.
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config PM_SLP_IRAM_OPT
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bool "Put lightsleep related codes in internal RAM"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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If enabled, about 2.1KB of lightsleep related source code would be in IRAM and chip would sleep
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longer for 310us at 160MHz CPU frequency most each time.
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This feature is intended to be used when lower power consumption is needed
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while there is enough place in IRAM to place source code.
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config PM_RTOS_IDLE_OPT
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bool "Put RTOS IDLE related codes in internal RAM"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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If enabled, about 180Bytes of RTOS_IDLE related source code would be in IRAM and chip would sleep
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longer for 20us at 160MHz CPU frequency most each time.
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This feature is intended to be used when lower power consumption is needed
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while there is enough place in IRAM to place source code.
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config PM_SLP_DISABLE_GPIO
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bool "Disable all GPIO when chip at sleep"
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depends on FREERTOS_USE_TICKLESS_IDLE
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help
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This feature is intended to disable all GPIO pins at automantic sleep to get a lower power mode.
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If enabled, chips will disable all GPIO pins at automantic sleep to reduce about 200~300 uA current.
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If you want to specifically use some pins normally as chip wakes when chip sleeps,
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you can call 'gpio_sleep_sel_dis' to disable this feature on those pins.
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You can also keep this feature on and call 'gpio_sleep_set_direction' and 'gpio_sleep_set_pull_mode'
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to have a different GPIO configuration at sleep.
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Waring: If you want to enable this option on ESP32, you should enable `GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL`
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at first, otherwise you will not be able to switch pullup/pulldown mode.
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config PM_SLP_DEFAULT_PARAMS_OPT
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bool
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default n
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config PM_CHECK_SLEEP_RETENTION_FRAME
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bool
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depends on PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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default n if !IDF_CI_BUILD
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help
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This option is invisible to users, and it is only used for ci testing,
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enabling it in the application will increase the sleep and wake-up time overhead
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config PM_LIGHTSLEEP_RTC_OSC_CAL_INTERVAL
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int "Calibrate the RTC_FAST/SLOW clock every N times of light sleep"
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default 1
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depends on PM_ENABLE
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range 1 128
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help
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The value of this option determines the calibration interval of the RTC_FAST/SLOW clock during sleep when
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power management is enabled. When it is configured as N, the RTC_FAST/SLOW clock will be calibrated
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every N times of lightsleep.
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Decreasing this value will increase the time the chip is in the active state, thereby increasing the
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average power consumption of the chip.
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Increasing this value can reduce the average power consumption, but when the external environment changes
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drastically and the chip RTC_FAST/SLOW oscillator frequency drifts, it may cause system instability.
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config PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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bool "Power down CPU in light sleep"
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depends on SOC_PM_SUPPORT_CPU_PD
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select PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP if ESP32S3_DATA_CACHE_16KB
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default y
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help
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If enabled, the CPU will be powered down in light sleep. On esp32c3 soc, enabling this
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option will consume 1.68 KB of internal RAM and will reduce sleep current consumption
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by about 100 uA. On esp32s3 soc, enabling this option will consume 8.58 KB of internal
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RAM and will reduce sleep current consumption by about 650 uA.
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config PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP
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bool "Power down I/D-cache tag memory in light sleep"
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depends on IDF_TARGET_ESP32S3 && PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP
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default y
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help
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If enabled, the I/D-cache tag memory will be retained in light sleep. Depending on the the
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cache configuration, if this option is enabled, it will consume up to 9 KB of internal RAM.
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config PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP
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bool "Power down Digital Peripheral in light sleep (EXPERIMENTAL)"
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depends on SOC_PAU_SUPPORTED
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default n #TODO: enable by default if periph init/deinit management supported (WIFI-5252)
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help
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If enabled, digital peripherals will be powered down in light sleep, it will reduce sleep
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current consumption by about 100 uA. Chip will save/restore register context at sleep/wake
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time to keep the system running. Enabling this option will increase static RAM and heap usage,
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the actual cost depends on the peripherals you have initialized. In order to save/restore the
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context of the necessary hardware for FreeRTOS to run, it will need at least 4.55 KB free heap
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at sleep time. Otherwise sleep will not power down the peripherals.
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Note1: Please use this option with caution, the current IDF does not support the retention of
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all peripherals. When the digital peripherals are powered off and a sleep and wake-up is completed,
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the peripherals that have not saved the running context are equivalent to performing a reset.
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!!! Please confirm the peripherals used in your application and their sleep retention support status
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before enabling this option, peripherals sleep retention driver support status is tracked in
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power_management.rst
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Note2: When this option is enabled simultaneously with FREERTOS_USE_TICKLESS_IDLE, since the UART will
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be powered down, the uart FIFO will be flushed before sleep to avoid data loss, however, this has the
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potential to block the sleep process and cause the wakeup time to be skipped, which will cause the tick
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of freertos to not be compensated correctly when returning from sleep and cause the system to crash.
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To avoid this, you can increase FREERTOS_IDLE_TIME_BEFORE_SLEEP threshold in menuconfig.
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config PM_UPDATE_CCOMPARE_HLI_WORKAROUND
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bool
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default y if PM_ENABLE && BTDM_CTRL_HLI
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endmenu # "Power Management"
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