kopia lustrzana https://github.com/espressif/esp-idf
121 wiersze
3.4 KiB
C
121 wiersze
3.4 KiB
C
/*
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* SPDX-FileCopyrightText: 2020-2021 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "esp_err.h"
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#include "esp_intr_alloc.h"
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#include "esp_etm.h"
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#include "soc/soc_caps.h"
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#include "hal/dma_types.h"
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#include "freertos/FreeRTOS.h"
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#include "esp_async_memcpy.h"
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#if SOC_CP_DMA_SUPPORTED
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#include "hal/cp_dma_ll.h"
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#include "hal/cp_dma_hal.h"
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#elif SOC_GDMA_SUPPORTED
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#include "esp_private/gdma.h"
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#endif
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/**
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* @brief Type of async mcp implementation layer context
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*
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*/
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typedef struct {
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#if SOC_CP_DMA_SUPPORTED
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cp_dma_hal_context_t hal; // CP DMA hal
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intr_handle_t intr; // CP DMA interrupt handle
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portMUX_TYPE hal_lock; // CP DMA HAL level spin lock
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#elif SOC_GDMA_SUPPORTED
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gdma_channel_handle_t tx_channel;
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gdma_channel_handle_t rx_channel;
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#endif
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intptr_t rx_eof_addr;
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size_t sram_trans_align;
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size_t psram_trans_align;
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bool isr_need_yield; // if current isr needs a yield for higher priority task
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} async_memcpy_impl_t;
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/**
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* @brief ISR callback function, invoked when RX done event triggered
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*
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* @param impl async mcp implementation layer context pointer
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*/
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void async_memcpy_isr_on_rx_done_event(async_memcpy_impl_t *impl);
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/**
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* @brief Initialize async mcp implementation layer
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_init(async_memcpy_impl_t *impl);
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/**
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* @brief Deinitialize async mcp implementation layer
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_deinit(async_memcpy_impl_t *impl);
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/**
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* @brief Start async mcp (on implementation layer)
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*
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* @param impl async mcp implementation layer context pointer
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* @param outlink_base base descriptor address for TX DMA channel
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* @param inlink_base base descriptor address for RX DMA channel
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_start(async_memcpy_impl_t *impl, intptr_t outlink_base, intptr_t inlink_base);
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/**
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* @brief Stop async mcp (on implementation layer)
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_stop(async_memcpy_impl_t *impl);
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/**
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* @brief Restart async mcp DMA engine
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*
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* @param impl async mcp implementation layer context pointer
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* @return Always return ESP_OK
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*/
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esp_err_t async_memcpy_impl_restart(async_memcpy_impl_t *impl);
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/**
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* @brief Get ETM Event handle
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*
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* @param impl async mcp implementation layer context pointer
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* @param event_type ETM event type
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* @param out_event Returned ETM event handle
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* @return ESP_OK on success, ESP_ERR_NOT_SUPPORTED if not supported in hardware, otherwise failed
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*/
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esp_err_t async_memcpy_impl_new_etm_event(async_memcpy_impl_t *impl, async_memcpy_etm_event_t event_type, esp_etm_event_handle_t *out_event);
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/**
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* @brief check if buffer address is valid
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* @note This is related to underlying target (e.g. on esp32-s2, only buffer located in SRAM is supported)
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*
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* @param impl async mcp implementation layer context pointer
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* @param src Source buffer address
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* @param dst Destination buffer address
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* @return True if both address are valid
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*/
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bool async_memcpy_impl_is_buffer_address_valid(async_memcpy_impl_t *impl, void *src, void *dst);
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#ifdef __cplusplus
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}
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#endif
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