// Copyright 2020 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software // distributed under the License is distributed on an "AS IS" BASIS, // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. // Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD // // Licensed under the Apache License, Version 2.0 (the "License"); // you may not use this file except in compliance with the License. // You may obtain a copy of the License at // // http://www.apache.org/licenses/LICENSE-2.0 // // Unless required by applicable law or agreed to in writing, software // distributed under the License is distributed on an "AS IS" BASIS, // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. // See the License for the specific language governing permissions and // limitations under the License. #pragma once #include #include "regi2c_bbpll.h" #include "regi2c_lp_bias.h" #include "regi2c_dig_reg.h" #include "regi2c_bias.h" #include "regi2c_saradc.h" #ifdef __cplusplus extern "C" { #endif /* Analog function control register */ #define I2C_MST_ANA_CONF0_REG 0x6000E040 #define I2C_MST_BBPLL_STOP_FORCE_HIGH (BIT(2)) #define I2C_MST_BBPLL_STOP_FORCE_LOW (BIT(3)) #define ANA_CONFIG_REG 0x6000E044 #define ANA_CONFIG_S (8) #define ANA_CONFIG_M (0x3FF) #define ANA_I2C_SAR_FORCE_PD BIT(18) #define ANA_I2C_BBPLL_M BIT(17) /* Clear to enable BBPLL */ #define ANA_I2C_APLL_M BIT(14) /* Clear to enable APLL */ #define ANA_CONFIG2_REG 0x6000E048 #define ANA_CONFIG2_M BIT(18) #define ANA_I2C_SAR_FORCE_PU BIT(16) /* ROM functions which read/write internal control bus */ uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add); uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb); void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data); void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data); /* Convenience macros for the above functions, these use register definitions * from regi2c_bbpll.h/regi2c_dig_reg.h/regi2c_lp_bias.h/regi2c_bias.h header files. */ #define REGI2C_WRITE_MASK(block, reg_add, indata) \ rom_i2c_writeReg_Mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB, indata) #define REGI2C_READ_MASK(block, reg_add) \ rom_i2c_readReg_Mask(block, block##_HOSTID, reg_add, reg_add##_MSB, reg_add##_LSB) #define REGI2C_WRITE(block, reg_add, indata) \ rom_i2c_writeReg(block, block##_HOSTID, reg_add, indata) #define REGI2C_READ(block, reg_add) \ rom_i2c_readReg(block, block##_HOSTID, reg_add) #ifdef __cplusplus } #endif