ecbbd3c3d9
Merge branch 'backport/add_ot_radio_stats_enable_config_5_1' into 'release/v5.1'
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feat(openthread): backport some openthread features(BackportV5.1)
See merge request espressif/esp-idf!26885
2023-11-22 12:23:53 +08:00
514cd783a3
Merge branch 'bugfix/esp32h2_ecdsa_hardware_k_v5.1' into 'release/v5.1'
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fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose (v5.1)
See merge request espressif/esp-idf!27271
2023-11-21 13:57:38 +08:00
0e1ec38785
Merge branch 'bugfix/fix_lightsleep_current_leakage_on_usj_pad_v5.1' into 'release/v5.1'
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fix(esp_hw_support): fix lightsleep current leakage on usb pad (backport v5.1)
See merge request espressif/esp-idf!27205
2023-11-21 10:51:11 +08:00
0ccfa4b0c2
fix(esp32h2): program use_hardware_k efuse bit for ECDSA key purpose
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In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.
In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
2023-11-20 16:03:29 +05:30
5719d882d1
Merge branch 'bugfix/fix_onebyte_watchpoint_setting_v5.1' into 'release/v5.1'
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fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting (v5.1)
See merge request espressif/esp-idf!27215
2023-11-20 17:37:03 +08:00
1b3713f7cd
Merge branch 'feature/support_adc_calibration_on_h2_v5.1' into 'release/v5.1'
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adc_cali: supported adc calibration v1 on ESP32H2 (v5.1)
See merge request espressif/esp-idf!26963
2023-11-17 16:41:00 +08:00
ddb6d22468
Merge branch 'feature/gpio_dump_io_info_v5.1' into 'release/v5.1'
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feat(gpio): add a dump API to dump IO configurations (v5.1)
See merge request espressif/esp-idf!26870
2023-11-17 16:30:22 +08:00
eb45eec5db
change(soc): rename SOC_CPU_WATCHPOINT_SIZE to SOC_CPU_WATCHPOINT_MAX_REGION_SIZE
2023-11-16 20:40:03 +08:00
6ae596c764
fix(esp_hw_support): fix lightsleep current leakage on usb-phy controlled pad
2023-11-16 20:03:30 +08:00
0172c33818
Merge branch 'bugfix/fix_deinit_init_wifi_scan_fail_issue_v5.1' into 'release/v5.1'
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Bugfix/fix deinit init wifi scan fail issue v5.1(Backport v5.1)
See merge request espressif/esp-idf!27064
2023-11-14 15:25:54 +08:00
c5e107c53d
feat(adc_cali): Add ADC calibration support for ESP32H2
2023-11-13 03:04:03 +00:00
666ba33829
fix(wifi): fix deinit init wifi scan fail issue
2023-11-10 11:15:38 +08:00
d9b776c59a
feat(efuse): Adds efuse ADC calibration data for ESP32H2
2023-11-07 15:41:59 +08:00
4892c481b5
feat(gpio): add a dump API to dump IO configurations
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Merges https://github.com/espressif/esp-idf/pull/12511
2023-11-03 16:21:31 +08:00
9b3e40c9d1
feat(pm/deepsleep): Support EXT1_WAKEUP_MODE_PER_PIN
2023-11-03 11:02:56 +08:00
1aabb5f0d5
Merge branch 'bugfix/revert_pvt_v5.1' into 'release/v5.1'
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Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2" (v5.1)
See merge request espressif/esp-idf!26485
2023-10-18 10:44:14 +08:00
754b2a0de1
fix(interrupts): reorder esp32s3 irq names to align with the respective irq numbers
2023-10-16 22:20:45 +02:00
17c2931309
feat(bootloader): adjust dbias of bootloader, change clock of H2 to 64
...
MHz
2023-10-16 14:35:45 +08:00
81dcc61008
Revert "feat(volt): chip auto adjust volt for esp32c6 & esp32h2"
...
This reverts commit b221f87e00
2023-10-16 14:35:41 +08:00
0f51501495
Merge branch 'bugfix/h2_i2c1_no_signal_v5.1' into 'release/v5.1'
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fix(i2c): I2C port 1 doesn't work on esp32h2 (backport v5.1)
See merge request espressif/esp-idf!26459
2023-10-16 14:13:23 +08:00
ae604cbbdd
fix(i2c): I2C port 1 doesn't work on esp32h2
2023-10-13 15:57:18 +08:00
49013a0560
feat(modem_clock): separate management of modem_adc_common_fe clock and modem_private_fe
2023-09-28 16:24:39 +00:00
1adcaf7f99
Merge branch 'feature/support_7.6.1_soc/pvt_auto_dbias_v5.1' into 'release/v5.1'
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rtc: auto adjust HP LDO voltage using pvt function(backport 5.1)
See merge request espressif/esp-idf!25995
2023-09-28 13:35:00 +08:00
9337525cdc
fix(phy): Fix PHY enabled enter WiFi RX state default
2023-09-27 14:55:25 +08:00
7bbe19d92f
feat(volt): chip auto adjust volt for esp32c6 & esp32h2
2023-09-27 06:39:59 +00:00
179e3293be
change: remove has clock bug macro for esp32h2
2023-09-25 13:40:26 +08:00
bb33a2bf6b
fix cpu switches freq bug s2s3 to v5.1
2023-09-19 11:27:08 +08:00
41a291fee0
fix(wdt): changed WDT clock source to XTAL for C6/H2
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Previously it used PLL, but PLL could potentially be powered down by power-management
when CPU frequency changed.
2023-09-13 10:45:51 +08:00
c192ea478e
fix(wdt): changed ESP32-C3 WDT to use XTAL as clock
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This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
2023-09-13 10:45:49 +08:00
9eceef649b
Merge branch 'bugfix/esp32h2_update_desc_ecdsa_workmode_v5.1' into 'release/v5.1'
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fix(soc/esp32h2): Update the description of the ECDSA_WORK_MODE (backport v5.1)
See merge request espressif/esp-idf!25818
2023-09-08 16:09:42 +08:00
9ed6944c0d
fix(soc/esp32h2): Update the description of the ECDSA_WORK_MODE
2023-09-07 10:34:36 +08:00
d3bfaf8f5f
feat(esp_hw_support): manage modem_etm clock in modem_clock for bt/154 indepently
2023-09-06 15:48:37 +08:00
b58706c1d2
Merge branch 'feature/support_hp_regi2c_for_esp32c6_v5.1' into 'release/v5.1'
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feat(esp_rom): support hp regi2c for esp32c6(backport v5.1)
See merge request espressif/esp-idf!25644
2023-08-31 10:49:58 +08:00
05cd295a28
fix(esp_rom): fix esp32c6, esp32h2 hp_regi2c ops data conflict with phy ops
2023-08-30 14:28:55 +08:00
d2730608d2
feature(esp_rom): support_hp_regi2c_for_esp32c6
2023-08-30 14:28:37 +08:00
c240a1f46b
feat(MCPWM): Add mcpwm carrier clk source
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The MCPWM carrier is part of the operator and can work independently
without the MCPWM timer being enabled. This commit add the MCPWM
carrier clk source.
2023-08-25 17:34:58 +08:00
2de3e90c21
Merge branch 'feature/periodic_adv_enhancement_v5.1' into 'release/v5.1'
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NimBLE : Added periodic Adv Feature Updates in BLE 5.3 (v5.1)
See merge request espressif/esp-idf!25489
2023-08-24 17:14:43 +08:00
a66f61e33f
Merge branch 'feature/usb_host_restrict_ahb_errata_workaround_to_esp32s2_eco0_v5.1' into 'release/v5.1'
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USB Host: Restrict ESP32-S2 AHB errata workaround to only ECO0 chips (v5.1)
See merge request espressif/esp-idf!25054
2023-08-24 10:12:48 +08:00
d57466da3c
feat(nimble): Added periodic Adv Feature Updates in BLE 5.3
2023-08-23 18:53:51 +05:30
b638cb3335
Merge branch 'bringup/esp32h2_deep_sleep_for_rebase_v5.1' into 'release/v5.1'
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esp32h2: support deep_sleep(backport v5.1)
See merge request espressif/esp-idf!24962
2023-08-23 20:12:01 +08:00
96b312ddde
soc: Move revision MAX/MIN static assert to esp_hw_support
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Previously, "soc/chip_revision.h" contained a static assert to check that the
CONFIG_ESP_REV_MIN_FULL <= CONFIG_ESP_REV_MAX_FULL. There are two issues with
this assert:
- Contained in a header file, so it is only compiled if the "chip_revision.h"
is included somewhere
- CONFIG_ESP_REV_MIN_FULL and CONFIG_ESP_REV_MAX_FULL are defined in
"esp_hw_support", which is a G0 component. This creates a reverse dependency
of G0 on G1.
This commit moves the static assert "revision.c" in "esp_hw_support".
2023-08-17 15:26:23 +08:00
aaf04f514f
fix(esp_hw_support): manage i2c_ana_mst clock witch modem clock driver
2023-08-04 12:04:40 +08:00
b27e57db7b
feat(pm/deepsleep): Support EXT1 wakeup for esp32h2 deep_sleep
2023-08-03 16:46:55 +08:00
6768f098dc
change(driver/rtcio): Describe RTCIO CAPS with more accurate note
2023-08-03 16:46:55 +08:00
4bc5e24f82
feat(pm/deepsleep): Support deep_sleep example and deep_sleep_wake_stub example for esp32h2
2023-08-03 16:46:54 +08:00
45eb0b6271
cache: fix cache suspended/resumed twice on S3
2023-07-31 14:52:03 +08:00
d83fe16c93
Merge branch 'bugfix/revert_26mhz_esp32c2_bad_apb_clock_fix' into 'release/v5.1'
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Revert "fix(soc): fix wrong freq definition for 26Mhz version esp32c2 soc" (v5.1)
See merge request espressif/esp-idf!24983
2023-07-31 10:26:58 +08:00
d026b92c75
Merge branch 'bugfix/fix_c6_wrong_pwdet_register_v5.1' into 'release/v5.1'
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pwdet: fix pwdet wrong base address on c6 h2 (v5.1)
See merge request espressif/esp-idf!25025
2023-07-31 10:22:57 +08:00
6fb014d535
Merge branch 'feature/add_ble_multi_conn_example_with_vs_hci_5.1' into 'release/v5.1'
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feat(ble): Added ble examples for multiple connections
See merge request espressif/esp-idf!24814
2023-07-28 15:35:54 +08:00
fcb3ae32cb
fix(pwdet): fix pwdet wrong base address on c6 h2
2023-07-27 12:30:44 +08:00
Shu Chen