esp-idf

Wykres commitów

Autor	SHA1	Wiadomość	Data
Sachin Parekh	301dacfb33	Exception handlers for LoadStoreError and LoadStoreAlignmentError Configurable option to use IRAM as byte accessible memory (in single core mode) using load-store (non-word aligned and non-word size IRAM access specific) exception handlers. This allows to use IRAM for use-cases where certain performance penalty (upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration option has been provided to redirect mbedTLS specific in-out content length buffers to IRAM (in single core mode), allows to save 20KB per TLS connection.	2020-02-26 20:21:59 +08:00
Renz Christian Bagaporo	0908fba1a3	mbedtls: import mbedtls project w/o modification	2018-11-27 13:59:26 +08:00
Mahavir Jain	54382277b6	mbedtls: configurable options for controlling dynamic memory allocations Modifies https://github.com/espressif/esp-idf/pull/2237	2018-09-24 11:17:48 +05:30

Autor

SHA1

Wiadomość

Data

Sachin Parekh

301dacfb33

Exception handlers for LoadStoreError and LoadStoreAlignmentError

Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.

2020-02-26 20:21:59 +08:00

Renz Christian Bagaporo

0908fba1a3

mbedtls: import mbedtls project w/o modification

2018-11-27 13:59:26 +08:00

Mahavir Jain

54382277b6

mbedtls: configurable options for controlling dynamic memory allocations

Modifies https://github.com/espressif/esp-idf/pull/2237

2018-09-24 11:17:48 +05:30

3 Commity (e736c20cc98a0b0ca14929093b89587bf4cef5b5)