esp-idf

Wykres commitów

Autor	SHA1	Wiadomość	Data
Marius Vikhammer	3c358dd074	ulp: only enable relevant wakeup sources for ULP Do not enable co-processor trap wakeup source when running ULP FSM, as this could cause spurious wake-ups.	2022-06-29 11:57:05 +08:00
Sudeep Mohanty	a0e3d488da	ulp: Added support for ULP FSM on esp32s3 and fixed bugs for esp32s2 This commit enables ULP FSM support for esp32s3 and updates ULP FSM code flow for other chips. It adds C Macro support for the ULP FSM instruction set on esp32s2 and esp32s3. The unit tests are also updated to test ULP FSM on ep32s2 and esp32s3.	2022-06-29 11:57:02 +08:00
Marius Vikhammer	386739595f	RISCV-ULP: Add DS18B20 1wire RISCV-ULP example	2021-06-25 11:26:39 +08:00

Autor

SHA1

Wiadomość

Data

Marius Vikhammer

3c358dd074

ulp: only enable relevant wakeup sources for ULP

Do not enable co-processor trap wakeup source when running ULP FSM, as this
could cause spurious wake-ups.

2022-06-29 11:57:05 +08:00

Sudeep Mohanty

a0e3d488da

ulp: Added support for ULP FSM on esp32s3 and fixed bugs for esp32s2

This commit enables ULP FSM support for esp32s3 and updates ULP FSM code
flow for other chips.
It adds C Macro support for the ULP FSM instruction set on esp32s2 and
esp32s3.
The unit tests are also updated to test ULP FSM on ep32s2 and esp32s3.

2022-06-29 11:57:02 +08:00

Marius Vikhammer

386739595f

RISCV-ULP: Add DS18B20 1wire RISCV-ULP example

2021-06-25 11:26:39 +08:00

3 Commity (df8c0f21910baff14903d4ab04ce371da30f7471)