Wykres commitów

14 Commity (d9d8c0365e4b1e2e87636fa8de2c3955573e30de)

Autor SHA1 Wiadomość Data
Planck (Lu Zeyu) 255d499884 fix(ll): fix cpp compile error
Merges https://github.com/espressif/esp-idf/pull/12093

fix(ll): remove FLAG_ATTR macro

Such kind of operator overload will not work because C++ thinks such overload is ambiguous and it still prefer the built-in one which accepts and returns integer. Manually force type conversion seems to be unavoidable.
2023-09-14 14:48:12 +08:00
Cao Sen Miao 6c0aebe279 esp_flash: add opi flash support in esp_flash chip driver, for MXIC 2021-09-07 14:44:40 +08:00
Cao Sen Miao 559c1ac3f9 esp_flash: add support mxic as a main flash under spi mode 2021-09-05 00:33:28 +08:00
Cao Sen Miao fecf27e54c spi_flash: add support for 32Mbit address GD flash, for GD25Q256 2021-07-02 17:13:51 +08:00
Cao Sen Miao 78a2dbe42a spi_flash: add a new function to support read the unique id
Close https://github.com/espressif/esp-idf/pull/4255
2021-03-15 11:40:33 +08:00
Cao Sen Miao 0b7caf96a9 spi_flash:modify nvs reading writing issue on esp32s3 2021-03-03 22:02:32 +08:00
Cao Sen Miao 9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
Angus Gratton d4c9a45675 spi_flash: Add ESP32-C3 support
Based on internal commit 3ef01301fff
2020-12-17 15:34:13 +11:00
Michael (XIAO Xufeng) 3bacf35310 esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
Michael (XIAO Xufeng) 2d440e408a esp_flash: fix the data type of delay_us
unsigned can be 16-bit on some architecture, which doesn't meet the
requirements of delaying for several hundreds of us.
2020-08-31 18:10:32 +00:00
Michael (XIAO Xufeng) a9c8895bb2 esp_flash: refactor to be compatible with the latest ROM
Including:
1. Change the write bytes/read bytes parameter in the host driver into slicers to meet the requirements of complicated cases.
2. Refactor the esp_flash_api code a bit so that we can use the code in the ROM laster
3. Provide get_temp_buffer and release_temp_buffer in the os_functions when the buffer passed by application cannot be used directly.
4. Make timeout of operations configurable in the chip_driver.
5. Make dummy number configurable.
2020-07-12 02:09:45 +08:00
Michael (XIAO Xufeng) 571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng) e5704ab1a8 esp_flash: fix the set/get write protection functions
Add support for get write protection support, fixed the duplicated
set_write_protection link.

All the write_protection check in the top layer are removed. The lower
levels (chip) should ensure to disable write protection before the
operation start.
2019-08-08 23:18:00 +08:00
Michael (XIAO Xufeng) 1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00