esp-idf

Wykres commitów

Autor	SHA1	Wiadomość	Data
gaoxu	4f24f805cc	feat(uart): add LP-UART GPIO support	2023-10-08 10:10:02 +08:00
SalimTerryLi	874a720286	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci	2021-08-30 13:50:58 +08:00
Angus Gratton	c29d93986d	soc: Add initial ESP32-C3 support From internal commit 7761d6e8	2020-11-30 11:12:56 +11:00

Autor

SHA1

Wiadomość

Data

gaoxu

4f24f805cc

feat(uart): add LP-UART GPIO support

2023-10-08 10:10:02 +08:00

SalimTerryLi

874a720286

soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one

update all struct headers to be more "standardized":

- bit fields are properly wrapped with struct
- bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits
- bit field should be uint32_t
- typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199

added helper macros to force peripheral registers being accessed in 32 bitwidth

added a check script into ci

2021-08-30 13:50:58 +08:00

Angus Gratton

c29d93986d

soc: Add initial ESP32-C3 support

From internal commit 7761d6e8

2020-11-30 11:12:56 +11:00

3 Commity (cfcdacaaac82ac389c2dc013fb6884a0df9c6701)