Wykres commitów

11 Commity (c83d1db2ed18245f1290a2752f2cb4722c22cc6e)

Autor SHA1 Wiadomość Data
Marius Vikhammer 55879e36ab system: fix printf format errors in all system and cxx examples 2022-12-12 12:55:02 +08:00
Fu Hanxi 67cd264535 pytest: check duplicates test case/script names 2022-12-08 09:49:12 +08:00
Marius Vikhammer 77ba84eeb7 ulp-fsm: Update ulp-fsm ADC example with S3 support
Closes https://github.com/espressif/esp-idf/issues/7963
2022-09-07 16:48:06 +08:00
Ivan Grokhotkov e596c84d49 build system: re-add -Wno-format as private flag for some example components 2022-08-03 16:42:47 +04:00
Armando 5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
Djordje Nedic facab8c5a7 tools: Increase the minimal supported CMake version to 3.16
This updates the minimal supported version of CMake to 3.16, which in turn enables us to use more CMake features and have a cleaner build system.
This is the version that provides most new features and also the one we use in our latest docker image for CI.
2022-06-01 06:35:02 +00:00
Marius Vikhammer 9918bbeb63 CI: migrated system example tests to pytest-embedded framework 2022-03-14 16:32:44 +08:00
Sudeep Mohanty 2fc9bd61bf ulp: refactor ulp component
This commit refactors the ulp component.
Files are now divided based on type of ulp, viz., fsm or risc-v.
Files common to both are maintained in the ulp_common folder.

This commit also adds menuconfig options for ULP within the ulp
component instead of presenting target specific configuations for ulp.
2022-01-27 11:54:42 +05:30
Roland Dobai 766aa57084 Build & config: Remove leftover files from the unsupported "make" build system 2021-11-11 15:32:36 +01:00
Jakob Hasse 81e9266204 [examples]: removed hyphens
Replaced hyphens with underscores in examples
project definition for all examples which had
hyphens in their project name. dpp-enrollee is
an exceptions because the name matches the
project directory name while the project
directory also contains hyphens.
2021-10-09 13:58:24 +08:00
Marius Vikhammer 386739595f RISCV-ULP: Add DS18B20 1wire RISCV-ULP example 2021-06-25 11:26:39 +08:00