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199 Commity (bdb01b828566696ae4e1e4197f37cde7294c8292)

Autor SHA1 Wiadomość Data
Marius Vikhammer 018582dc64 ULP: reduce max possible memory reserved for ULP coprocessor 
Some RTC slow memory is reserved by IDF, reduce CONFIG_TARGET_ULP_COPROC_RESERVE_MEM
range to reflect this.

Closes https://github.com/espressif/esp-idf/issues/7073
 2021-06-04 12:15:52 +08:00
morris 7c1e1c9e2d systimer: update soc data 2021-04-22 21:07:35 +08:00
David Čermák 7f34657013 Merge branch 'feature/ethernet_link_check_esp_timer' into 'master' 
esp_eth: using esp_timer to check link status

Closes IDFGH-4953

See merge request espressif/esp-idf!13155
 2021-04-22 06:08:00 +00:00
Ivan Grokhotkov 0535195983 freertos: fix TLS run-time address calculation 
Since dd849ffc, _rodata_start label has been moved to a different
linker output section from where the TLS templates (.tdata, .tbss)
are located. Since link-time addresses of thread-local variables are
calculated relative to the section start address, this resulted in
incorrect calculation of THREADPTR/$tp registers.

Fix by introducing new linker label, _flash_rodata_start, which points
to the .flash.rodata output section where TLS variables are located,
and use it when calculating THREADPTR/$tp.

Also remove the hardcoded rodata section alignment for Xtensa targets.
Alignment of rodata can be affected by the user application, which is
the issue dd849ffc was fixing. To accommodate any possible alignment,
save it in a linker label (_flash_rodata_align) and then use when
calculating THREADPTR. Note that this is not required on RISC-V, since
this target doesn't use TPOFF.
 2021-04-21 13:45:21 +02:00
morris c833ec5533 global: remove esp_ssc.h 2021-04-21 13:08:07 +08:00
Omar Chebib dd849ffc26 build: (Custom) App version info is now on a dedicated section, independent of the rodata alignment 
It is now possible to have any alignment restriction on rodata in the user
applicaiton. It will not affect the first section which must be aligned
on a 16-byte bound.

Closes https://github.com/espressif/esp-idf/issues/6719
 2021-04-19 12:53:08 +08:00
Martin Vychodil f27c9c5139 esp32c3: memprot API upgrade and test application 
Closes IDF-2641
 2021-04-12 13:44:11 +10:00
Renz Bagaporo a202a604d8 esp32: move system libs 2021-03-31 19:17:33 +08:00
Renz Bagaporo bbc599493e esp32: move common fragment definitions 2021-03-31 19:17:33 +08:00
Renz Bagaporo 1b4e4c37b7 esp32: remove deprecated esp_intr.h 2021-03-31 19:17:33 +08:00
Renz Bagaporo 9478298aa4 esp32: move mac target specific configs 2021-03-31 19:17:33 +08:00
Renz Bagaporo e6edf34e82 esp32: move esp_clk functions 2021-03-31 19:17:33 +08:00
Renz Bagaporo a7bac58480 esp32: move system api to esp_system 2021-03-31 19:13:03 +08:00
Renz Bagaporo 393bd64a1e esp32: move crosscore int 2021-03-31 19:13:03 +08:00
Renz Bagaporo 7d85c42e52 esp32: move brownout and cache err int setup 2021-03-31 19:13:03 +08:00
Renz Bagaporo 6014e3a198 esp32: move stack check test 2021-03-31 19:13:03 +08:00
Renz Bagaporo 784a02a4ee esp32: move hw random 2021-03-31 19:13:03 +08:00
Marius Vikhammer 8ac74082f1 soc: add dummy bytes to ensure instr prefetch always valid 
The CPU might prefetch instructions, which means it in some cases
will try to fetch instruction located after the last instruction in
flash.text.

Add dummy bytes to ensure fetching these wont result in an error,
 e.g. MMU exceptions
 2021-03-29 13:50:03 +08:00
Omar Chebib 5371231935 build: fix linker scripts edition not triggering a rebuild 
Fix the dependencies in CMakeLists files for triggering a relink
when linker script file is modified.
 2021-03-12 07:48:32 +00:00
Renz Bagaporo 115b6ac0ac esp32: transfer coredump linker script blocks to ldgen 2021-03-01 14:19:34 +08:00
Renz Bagaporo 633ead5dcb esp32: move coredump sections and schemes to espcoredump 2021-03-01 14:19:34 +08:00
Renz Bagaporo 4bf07ae7d9 esp32: move wifi related sections and schemes to esp_wifi 2021-03-01 14:19:34 +08:00
Renz Bagaporo b99777066f ldgen: implement flags support 
Implement support for KEEP, ALIGN, emitting symbols and SORT.
Add appropriate tests
Defines default mapping in linker fragment file
 2021-03-01 14:19:34 +08:00
Angus Gratton 56048b8428 Merge branch 'bugfix/ds_invalidate_assert' into 'master' 
esp32s2 ds: Fix invalidating Digital Signature key from HMAC peripheral if assertions are disabled

See merge request espressif/esp-idf!12459
 2021-02-26 08:16:49 +00:00
Angus Gratton a0eb455ec3 Merge branch 'refactor/misc_move_from_esp_common' into 'master' 
Movements from esp_common

Closes IDF-1947

See merge request espressif/esp-idf!9692
 2021-02-24 23:16:52 +00:00
Angus Gratton f72c296827 Merge branch 'bugfix/deepsleep_disable_brownout_s2' into 'master' 
deep_sleep: on S2 disable the brown out detector before deep sleeping

Closes IDF-2716 and IDFGH-4341

See merge request espressif/esp-idf!12348
 2021-02-24 05:48:19 +00:00
Renz Bagaporo ae15c81dbe esp_common: move to esp_hw_support 2021-02-24 12:16:37 +08:00
Angus Gratton 47de421a0a esp32s2 ds: Fix invalidating Digital Signature key from HMAC peripheral if assertions are disabled 2021-02-23 18:18:40 +11:00
Marius Vikhammer 0a4e5c99f9 deep_sleep: on S2 disable the brown out detector before deep sleeping 
On S2 the brown out detector would occasionally trigger erroneously during deep sleep.

Disable it before sleeping to circumvent this issue.

Closes https://github.com/espressif/esp-idf/issues/6179
 2021-02-18 18:39:06 +08:00
Angus Gratton ecdc214466 esp32s2: Simplify the code for adding spiram to heap 2021-02-18 16:27:43 +11:00
Angus Gratton f5685e6a64 esp32s2: Remove unused option CONFIG_SPIRAM_USE_AHB_DBUS3 2021-02-18 16:27:43 +11:00
Marius Vikhammer fa7aa656d3 build-system: add loadable elf support for ESP32-S2 and C3 2021-02-02 17:21:39 +08:00
Martin Vychodil 69096ddce5 Security: ESP32C3 memory protection feature (IRAM0/DRAM0) 
Software support for PMS module.
Allows controlled memory access to IRAM (R/W/X) and DRAM0 (R/W)
On/locked by default, configurable in Kconfig (esp_system)

Closes https://jira.espressif.com:8443/browse/IDF-2092
 2021-01-27 08:44:03 +01:00
Fu Hanxi 0146f258d7 style: format python files with isort and double-quote-string-fixer 2021-01-26 10:49:01 +08:00
ninh 659d805411 esp_wifi: light sleep optimization 2021-01-18 15:31:03 +08:00
Angus Gratton f683db7aea Merge branch 'feature/c3_IDF-2554' into 'master' 
global: Uses CCOUNT API instead of XTHAL macro

Closes IDF-2554

See merge request espressif/esp-idf!11954
 2021-01-13 12:55:21 +08:00
KonstantinKondrashov dada7cd035 global: Uses CCOUNT API instead of XTHAL macro 2021-01-12 16:24:23 +08:00
morris 753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Jakob Hasse e532a29288 [Peripheral/Security] DS peripheral driver 2021-01-05 12:26:59 +08:00
Angus Gratton 1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master' 
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
 2020-12-29 11:41:05 +08:00
Darian Leung 602a747b31 Add USB Host registers and types and LL layer 
This commit adds the register struct, Low Level Layer, and
protocol types for USB Host
 2020-12-24 19:43:42 +08:00
Angus Gratton c3ba995f2c Merge branch 'ci/ccomp_performance_tests' into 'master' 
unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
 2020-12-24 13:44:52 +08:00
Mahavir Jain 880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips 
Closes IDF-2503
 2020-12-24 09:46:35 +05:30
Angus Gratton 55155c3f82 esp_system: Rename _init_start symbol to _vector_table 2020-12-24 13:40:01 +11:00
Marius Vikhammer 0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
 2020-12-22 18:56:24 +11:00
Angus Gratton 19bf4aea74 esp32s2: Fix embedded flash feature flag for ESP32-S2FH16, ESP32-S2FH32 
Corrects the output printed by the hello_world example.

Closes https://github.com/espressif/esp-idf/issues/5774
 2020-11-17 18:16:25 +11:00
Angus Gratton 420aef1ffe Updates for riscv support 
* Target components pull in xtensa component directly
* Use CPU HAL where applicable
* Remove unnecessary xtensa headers
* Compilation changes necessary to support non-xtensa gcc types (ie int32_t/uint32_t is no
  longer signed/unsigned int).

Changes come from internal branch commit a6723fc
 2020-11-13 07:49:11 +11:00
Angus Gratton 66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
Angus Gratton e82eac4354 cmake: Apply cmakelint fixes 2020-11-11 07:36:35 +00:00
KonstantinKondrashov e9978f7623 esp32xx: Fix default values for all RTC sources in RTC_CLK_CAL_CYCLES option 
Closes: https://github.com/espressif/esp-idf/issues/6037
 2020-10-28 16:25:07 +08:00