Wykres commitów

463 Commity (a8aead1986b39f60168b0c806096568490388eb0)

Autor SHA1 Wiadomość Data
Michael (XIAO Xufeng) a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
Marius Vikhammer cf41c255bb Merge branch 'bugfix/cache_disabled_log_c3' into 'master'
esp_hw_support: always inline cpu_hal_set_vecbase to avoid issues at -O0

See merge request espressif/esp-idf!18630
2022-07-06 09:55:20 +08:00
cje e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov 0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
Martin Vychodil 29c0703d7e Merge branch 'bugfix/esp32s3_memprot_wrong_check_unicore' into 'master'
System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3)

Closes IDF-5401

See merge request espressif/esp-idf!18834
2022-07-04 16:41:45 +08:00
Marius Vikhammer 4720607229 Merge branch 'bugfix/c2_mac_address' into 'master'
mac addr: fix wrong offset being used for C2 BT mac address

Closes IDF-5046

See merge request espressif/esp-idf!18717
2022-07-04 14:04:13 +08:00
Omar Chebib 7e42038c86 Merge branch 'refactor/move_regi2c_headers' into 'master'
Refactor: move regi2c_*.h header files from esp_hw_support to soc component

See merge request espressif/esp-idf!18676
2022-07-04 11:32:30 +08:00
Mahavir Jain cd1555ec03 Merge branch 'esp32c2_check_ocd_mode' into 'master'
esp32c2: check ocd mode before configure memprot

See merge request espressif/esp-idf!18655
2022-07-04 11:22:25 +08:00
Martin Vychodil ee9aa9a302 System/Security: fix missing checks for CPU-count sensitive Memprot APIs (ESP32S3)
Some of the Memory Protection (internal) API functions dealing with per-CPU operations were missing appropriate handling of the CPU count actually configured by CONFIG_FREERTOS_UNICORE. The flaw was fixed across all the places found in the code as the issue was of general type
2022-07-02 20:12:56 +00:00
Cao Sen Miao a690a87829 spi_flash: Remove legacy spi_flash drivers 2022-07-01 11:01:34 +08:00
Omar Chebib cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
Aditya Patwardhan c6fe3ba7c6 esp_hmac: Fix documentation for API and Programming Guide 2022-06-28 12:47:28 +00:00
morris 602e154c12 Merge branch 'refactor/move_gdma_to_hw_support' into 'master'
dma: move from driver to hw_support

See merge request espressif/esp-idf!18706
2022-06-28 15:57:56 +08:00
Armando (Dou Yiwen) 4dbd2c7e30 Merge branch 'refactor/move_spi_necessary_private_headers' into 'master'
spi: move spi_common_internal to esp_private

See merge request espressif/esp-idf!18146
2022-06-28 15:51:22 +08:00
Marius Vikhammer 4ffb15916e mac addr: fix wrong offset being used for C2 BT mac address 2022-06-28 15:30:24 +08:00
morris 7fd9a91034 dma: move from driver to hw_support 2022-06-28 14:17:12 +08:00
Marius Vikhammer a8e9c6b8b2 esp_hw_support: always inline cpu_hal_set_vecbase 2022-06-28 05:53:27 +00:00
Armando f31d88e3fe spi: move spi_common_internal to esp_private 2022-06-24 19:12:13 +08:00
Erhan Kurubas 480e2ab149 esp32c2: check ocd mode before configure memprot 2022-06-24 09:13:02 +03:00
Marius Vikhammer 42aa4ee3d4 ulp: only enable relevant wakeup sources for ULP
Do not enable co-processor trap wakeup source when running ULP FSM, as this
could cause spurious wake-ups.
2022-06-24 02:30:29 +00:00
Cao Sen Miao 2c0651a671 Add regi2c enable/disable reference count 2022-06-23 15:36:44 +08:00
Marius Vikhammer 7e60e07a0a Merge branch 'feature/esp8684_sha' into 'master'
mbedtls: enable hw support for SHA on C2

Closes IDF-3830 and IDF-5141

See merge request espressif/esp-idf!18531
2022-06-23 14:18:49 +08:00
Marius Vikhammer f4c79687f8 SHA: added hardware support for SHA on C2. 2022-06-23 11:01:16 +08:00
Omar Chebib 8fae0f0753 G0: Support Xtensa targets for G0-only compilation
G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
Martin Vychodil 692b9980b5 Merge branch 'feature/memprot_api_unified_s3_2' into 'master'
System/Security: Memprot API unified (ESP32S3)

See merge request espressif/esp-idf!16169
2022-06-20 17:34:22 +08:00
Martin Vychodil 339fcbf14d System/Security: Memprot API unified (ESP32S3)
Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
jingli 3a908c66e6 use API instead of Kconfig 2022-06-17 19:57:47 +08:00
jingli 824e0ddca8 improve flash power down logic 2022-06-17 18:01:43 +08:00
Omar Chebib 752026a174 Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
G0: RISC-V targets have now an independent G0 layer

See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
Armando (Dou Yiwen) 0b80546f8e Merge branch 'feature/new_esp_psram_component' into 'master'
esp_psram: new esp psram component

Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192

See merge request espressif/esp-idf!18050
2022-06-15 19:16:56 +08:00
Michael (XIAO Xufeng) 7c7d53813c Merge branch 'feat/revert_touch_s3' into 'master'
touch: Added support for using touch in sleep modes back on ESP32-S3

Closes IDF-5041

See merge request espressif/esp-idf!18421
2022-06-15 16:11:50 +08:00
Jiang Jiang Jian 20e5a989a2 Merge branch 'feature/esp32c2_support_ble_sleep' into 'master'
Support ESP32C2 BLE modem sleep and lightsleep

See merge request espressif/esp-idf!18432
2022-06-15 15:39:55 +08:00
Jing Li 074c708cf0 Merge branch 'refactor/simplify_code_for_time_compensation_when_sleep' into 'master'
system/sleep: simplify code for time compensation when wakeup from light sleep

See merge request espressif/esp-idf!18491
2022-06-15 14:38:40 +08:00
laokaiyao 621d0aa942 i2s: Introduced a brand new driver 2022-06-15 10:29:06 +08:00
Darian e213e66ba3 Merge branch 'refactor/esp_hw_support_cpu' into 'master'
esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
zwj fd90341138 support ble modem sleep and light sleep 2022-06-14 19:52:50 +08:00
Armando cdad8a02fe esp_psram: remove g_spiram_ok 2022-06-14 15:44:27 +08:00
Armando 38e5043ae8 esp_psram: new psram component 2022-06-14 15:44:27 +08:00
Omar Chebib 2fd784c97a G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h" 2022-06-14 15:00:53 +08:00
Omar Chebib 5bcd9b2db8 G0: RISC-V targets have now an independent G0 layer
G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
jingli 30e7af2ffb system/sleep: simplify code for time compensation when wakeup from light sleep 2022-06-14 14:49:26 +08:00
Darian Leung a8a3756b38 hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:

- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead

Also updated soc_hal.h as follows:

- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.

This commit also updates the XCHAL_ERRATUM_572 workaround by

- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
Darian Leung 61eb7baa6b esp_hw_support: Add esp_cpu.h abstraction and API
This commit updates the esp_cpu.h API. The new API presents a new
abstraction of the CPU where CPU presents the following interfaces:

- CPU Control (to stall/unstall/reset the CPU)
- CPU Registers (to read registers commonly used in SW such as SP, PC)
- CPU Interrupts (to inquire/allocate/control the CPUs 32 interrupts)
- Memory Port (to configure the CPU's memory bus for memory protection)
- Debugging (to configure/control the CPU's debugging port)

Note: Also added FORCE_INLINE_ATTR to the DoxyFile in order to pass doc
        builds for esp_cpu.h
2022-06-14 14:30:58 +08:00
Darian Leung 556ec30457 esp_hw_support: Rename cpu_util.c to cpu.c 2022-06-14 14:30:57 +08:00
songruojing 03477a59db rtc_clk: Fix rtc8m calibration failure after cpu/core reset
1. make sure 8md256 clk is enabled before calibration
2. improve bootloader and application startup 8m, 8md256 enable logic
2022-06-13 17:47:51 +08:00
songruojing c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Rahul Tank 2b097995bc Merge branch 'bugfix/fix_compilation_issue_esp32h2' into 'master'
NimBLE: fix compilation issue in nimble examples for ESP32H2

See merge request espressif/esp-idf!18438
2022-06-13 12:33:49 +08:00
Michael (XIAO Xufeng) 069ef38ff6 Revert "touch_sensor: forbid from using touch sensor with sleep on ESP32-S3"
This reverts commit a84faa3cef.
2022-06-13 01:51:12 +08:00
Armando 44f771c713 psram: support s3 copy flash to psram 2022-06-10 10:39:29 +08:00