When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:
1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.
For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.
This introduced two possible issues:
1. Overflow when multiplying systimer counter by 5
- Should not be an issue, since systimer counter is 52-bit, so
counter * 5 is no more than 55-bit.
2. The code needs to perform:
- divide by 5: when converting from microseconds to ticks
- divide by 52: when converting from ticks to microseconds
The latter potentially introduces a performance issue for the
esp_timer_get_time function.
After refactoring the target components (e.g. esp32) no longer contained any real functionality.
What remained in these components have been moved elsewhere and the component itself deleted from the
build system.
Some components were including esp_timer.h without declaring a
dependency on esp_timer component. This used to work due to a
transitive public dependency on esp_timer from freertos component.
Add explicit dependencies where needed.
Also some source files were using esp_timer functions without
including the header file. This used to work because esp_timer.h was
included from freertos port header file. This commit adds esp_timer.h
includes where needed.
1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with
upper level API esp_clk_xtal/apb_freq
2. Fix small errors and wrong comments related to clock
3. Add clk_tree_defs.h to provide an unified clock id for each chip
Modify the NGed drivers to adopt new clock ids
- For ESP32 | SPIRAM_MALLOC_ALWAYSINTERNAL=0
- Forced `esp_timer_create` to allocate resource from the internal memory
- WiFi/BT coexistence will sometimes arm/disarm timers from an ISR
where flash may be disabled. This can lead to a cache-based
exception as the timer instance will be located in the PSRAM.
This commit updates the visibility of various header files and cleans up
some unnecessary inclusions. Also, this commit removes certain header
include paths which were maintained for backward compatibility.
esp_timer:
Control flow issues (DEADCODE)
Execution cannot reach this statement: "break;".
protocomm_httpd:
(UNUSED_VALUE)
Assigning value from "cookie_session_id" to "cur_cookie_session_id" here, but that stored value is overwritten before it can be used.
esp_flash_api:
Null pointer dereferences (REVERSE_INULL)
Null-checking "chip" suggests that it may be null, but it has already been dereferenced on all paths leading to the check.
Added the following new APIs to the esp_timer module:
- esp_timer_get_period(): Returns the period of a timer in microseconds.
- esp_timer_get_expiry_time(): Returns the timeout value of a one-shot timer in microseconds.
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
Discard header lines from esp_timer_dump that comes before the actual timer
info. "esp_timer orders timers correctly" would crash when reading the header lines.
laokaiyao