esp-idf

Autor	SHA1	Wiadomość	Data
Armando	c331c85318	mspi: make cpu clock source switch safe For some of the MSPI high frequency setting (e.g. 80M DDR mode Flash or PSRAM), timing tuning is required. Certain delays will be added to the MSPI RX direction. When system clock switches down, the delays should be cleared. When system clock switches up, the delays should be restored.	2021-10-19 21:47:27 +08:00
Armando	2655a506c9	mspi: support auto detect octal flash vendor	2021-10-08 15:59:57 +08:00
Cao Sen Miao	6c0aebe279	esp_flash: add opi flash support in esp_flash chip driver, for MXIC	2021-09-07 14:44:40 +08:00
Armando	a3dc625da6	mspi: support 120MHz Quad Flash and PSRAM on ESP32S3	2021-08-31 16:06:44 +08:00
Armando	d325f4d557	mspi: support octal flash 120M STR mode on esp32s3	2021-08-19 10:44:30 +08:00
Armando	038b7b1fa9	mspi: update 80MHz DTR tuning algorithm and Oct PSRAM 80M DTR tuning parameters	2021-08-03 16:54:00 +08:00
Armando	0f91a01a46	mspi: support up-to-80MHz quad flash & up-to-80MHz octal psram on esp32s3	2021-08-03 16:54:00 +08:00
Armando	bc248278f8	spiflash: add octal spi psram support on 727	2021-06-25 19:41:57 +08:00