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754 Commity (3610b14aef055f51def67bddaf98a5609d99c9b5)

Autor SHA1 Wiadomość Data
gaoxu 3610b14aef SPI : fix wrong dummy cycle on quad mode and put get-command function in spi_ll.h
1.The dummy_bits is set to 4 in ESP32C3/C2, therefore, the data transmission started too early.This commit fix this issue by changing dummy_bits to 8.
2.Put the spi command the spi defintion in spi_types.h
3.Put the function which get spi command or dummy bits in spi_ll.h
2022-08-23 10:46:56 +08:00
Ivan Grokhotkov 401c10ecfb build system: re-add -Wno-format as private flag for some components 2022-08-03 16:42:47 +04:00
morris cf4cfc69ed esp_adc: add test with -O0 2022-08-02 23:07:06 +08:00
morris a5a171926b rmt: add test with -O0 2022-08-02 23:07:06 +08:00
morris 031adc01c4 gpio: add test with -O0 2022-08-02 23:07:06 +08:00
morris ca175857d1 pcnt: add test with -O0 2022-08-02 23:07:06 +08:00
morris 8987164385 i2s: add test with -O0 2022-08-02 23:07:06 +08:00
morris 7faf1bee73 gptimer: add test with -O0 2022-08-02 22:53:36 +08:00
Wan Lei 1265a2db9d Merge branch 'refactor/add_missing_include_path_for_soc_struct_files' into 'master'
Fix check_public_headers violations for soc component

Closes IDF-5397

See merge request espressif/esp-idf!19158
2022-08-01 10:14:04 +08:00
wuzhenghui 7cb9304b65 Clean IRAM and DRAM address space conversion macros 2022-07-29 17:07:39 +08:00
wanlei bb5a95f1aa soc: fix register header files not self-contain 2022-07-29 11:18:06 +08:00
morris ef02fb63dd Merge branch 'bugfix/fix_wrong_mmu_end_addr_check' into 'master'
mmu: fix wrong mmu end check in mmu_ll.h

See merge request espressif/esp-idf!19257
2022-07-28 12:00:35 +08:00
Armando f325ad2211 mmu: fix wrong mmu end check
In mmu code, we follow the rule that the `end` address shouldn't be
touched. This commit fix wrong end address check in mmu_ll.h
2022-07-27 10:22:09 +00:00
laokaiyao 77a5c209d9 dac_ll: sync PR changes to esp32s2 2022-07-27 14:45:48 +08:00
Florian Loitsch 2f307b8b65 Feedback. 2022-07-27 14:45:48 +08:00
Florian Loitsch 3793e90790 Fix offset for cosine wave function generator 2022-07-27 14:45:48 +08:00
morris 783e1781bd esp_rom: patch systimer driver for esp32c2 2022-07-25 16:08:52 +08:00
morris d94432fea8 systimer: refactor hal to accomodate more xtal choices 2022-07-25 16:08:52 +08:00
morris c4e84751a5 driver: fix public header exceptions for driver 2022-07-22 00:12:36 +00:00
morris 454d658309 rgb_lcd: workaround pclk polarity bug by setting mo>=2 2022-07-21 13:06:09 +00:00
laokaiyao edee3ee3cd i2s: add slot sequence table
Closes: https://github.com/espressif/esp-idf/issues/9208

When I2S is configured into different modes, the slot sequence varies.
This commit updates slot sequence tables and corresponding descriptions
in (both code and programming guide).
2022-07-21 15:52:39 +08:00
laokaiyao 90866e99fb i2s: add basic examples for STD/TDM/PDM mode 2022-07-21 15:52:39 +08:00
morris 4154eaec93 sdm: clean up soc/hal/ll code 2022-07-20 14:59:50 +08:00
Song Ruo Jing 4734b1433b Merge branch 'bugfix/gpio_hal_coverity_fix' into 'master'
gpio: Fix ESP32S3 GPIO48 does not support hold function bug and Fix coverity report

Closes IDF-4901

See merge request espressif/esp-idf!18805
2022-07-19 21:37:15 +08:00
Armando (Dou Yiwen) 9f6f61345b Merge branch 'feature/adc_driver_ng' into 'master'
ADC Driver NG

Closes IDF-4560, IDF-3908, IDF-4225, IDF-2482, IDF-4111, IDF-3610, IDF-4058, IDF-3801, IDF-3636, IDF-2537, IDF-4310, IDF-5150, IDF-5151, and IDF-4979

See merge request espressif/esp-idf!17960
2022-07-19 21:28:31 +08:00
Cao Sen Miao 53580a62b5 I2C: Fullfill the I2C clock tree, and support 26M XTAL on ESP32-C2 2022-07-19 11:41:42 +08:00
Armando 5b523a3313 esp_adc: new esp_adc component and adc drivers 2022-07-15 18:31:00 +08:00
songruojing 0c4b9a0101 gpio: Fix HAL bad bit shift operation on gpio_num_t reported from coverity
All gpio hal and ll functions input arguments gpio_num_t are changed to uint32_t type.
Validation of gpio num should be guaranteed from the driver layer.
2022-07-15 16:51:25 +08:00
Jiang Jiang Jian b610b47a83 Merge branch 'feature/esp32s3_memprot_additional_improvements' into 'master'
[System/Security] Memprot after-merge improvements (v5.0)

Closes IDF-5263 and IDF-5208

See merge request espressif/esp-idf!18893
2022-07-13 15:48:20 +08:00
Cao Sen Miao 683d92bc88 flash_encryption: Fix issue that flash encryption cannot work when 8-line psram enabled,
Closes https://github.com/espressif/esp-idf/issues/9244,
                  Closes https://github.com/espressif/esp-idf/issues/9287
2022-07-12 16:08:57 +08:00
Song Ruo Jing ea97cc93ea Merge branch 'feature/c2_systimer_26mhz' into 'master'
esp32c2: 26 MHz XTAL support: Kconfig option, systimer support

Closes IDF-5412 and IDF-5413

See merge request espressif/esp-idf!18835
2022-07-11 16:17:25 +08:00
Marius Vikhammer 6cc871d793 Merge branch 'feature/ulp_riscv_adc' into 'master'
ulp-riscv: add support for using ADC as well as an example show-casing it.

Closes IDFGH-7564 and IDF-1714

See merge request espressif/esp-idf!18767
2022-07-11 12:30:31 +08:00
songruojing 996fb0cce8 G0: hal/regi2c_ctrl.h now defines all REGI2C macros to pass g0_components build test 2022-07-11 12:24:58 +08:00
wuzhenghui a9c8065030 Kconfig: Update dependencies to avoid invalid configurations
1. Since the baud rate in the ROM cannot be changed,
   set the default baud rate of the 26Mhz version
   of esp32c2 to 74800
2. Since the systimer configuration of the 26Mhz
   version requires a non-integer systimer frequency
   configuration, and this feature is not supported
   in the current ROM, this option is disabled for
   the 26Mhz version esp32c2
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov 2e37218ce5 soc, hal: remove XTAL_CLK_FREQ
XTAL_CLK_FREQ now depends on the actual XTAL used, remove this macro
and get the XTAL frequency from the RTC register instead.
No uses of XTAL_CLK_FREQ found, other than in the UART LL.
2022-07-11 12:24:58 +08:00
Ivan Grokhotkov 5b54ae76d4 esp_timer, hal: add support for non-integer systimer frequency
When ESP32-C2 is paired with a 26 MHz XTAL, the systimer tick
frequency becomes equal to 26 / 2.5 = 10.4 MHz. Previously we always
assumed that systimer tick frequency is integer (and 1 MHz * power of
two, above that!).
This commit introduces a new LL macro, SYSTIMER_LL_TICKS_PER_US_DIV.
It should be set in such a way that:

1. SYSTIMER_LL_TICKS_PER_US / SYSTIMER_LL_TICKS_PER_US_DIV equals the
   actual systimer tick frequency,
2. and SYSTIMER_LL_TICKS_PER_US is integer.

For ESP32-C2 this means that SYSTIMER_LL_TICKS_PER_US = 52 and
SYSTIMER_LL_TICKS_PER_US_DIV = 5.

This introduced two possible issues:

1. Overflow when multiplying systimer counter by 5
   - Should not be an issue, since systimer counter is 52-bit, so
     counter * 5 is no more than 55-bit.
2. The code needs to perform:
   - divide by 5: when converting from microseconds to ticks
   - divide by 52: when converting from ticks to microseconds
   The latter potentially introduces a performance issue for the
   esp_timer_get_time function.
2022-07-11 12:24:37 +08:00
Marius Vikhammer e8b5096f52 ulp-riscv: add support for using ADC as well as an example show-casing it. 2022-07-11 09:31:22 +08:00
Martin Vychodil 0c87ae2a91 System/Security: Memprot API unified (ESP32S3)
Added missing features and improvements
2022-07-09 22:57:51 +02:00
Jiang Jiang Jian a7bf3af687 Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3

Closes BT-2402

See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
Michael (XIAO Xufeng) a58362a429 Merge branch 'feature/efuse_rev_major_minor' into 'master'
efuse: Adds major and minor versions

See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
Song Ruo Jing b662f4b74f Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
support c2 26M/32M xtal for bbpll

Closes IDF-5485

See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
morris a92cce9861 Merge branch 'bugfix/calib_i2c_clk' into 'master'
I2C: Make I2C clock frequency accurate

Closes IDF-5363

See merge request espressif/esp-idf!18686
2022-07-06 20:52:31 +08:00
wangmengyang 1d55f12c2d component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
Cao Sen Miao e218723e0e I2C: Make I2C clock frequency accurate 2022-07-06 11:58:08 +08:00
GengYuchao d145c337e0 Enable rpa_moudle reset function 2022-07-05 20:50:31 +08:00
cje e16165f263 support c2 26M/32M xtal for bbpll 2022-07-05 17:45:03 +08:00
KonstantinKondrashov 0f8ff5aa15 efuse: Adds major and minor versions and others 2022-07-05 14:38:27 +08:00
morris 7863c1bc45 Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
Bugfix/fix rtc freq err for h2 beta1

See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
Omar Chebib cd48baf979 Refactor: move regi2c_*.h header files from esp_hw_support to soc component
When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
GengYuchao 10fd1daa10 Add ETM clk gate defines for h2 2022-06-30 17:02:00 +08:00