740f8a79f0
Add logic to make external RAM usable with malloc()
2017-09-28 17:17:50 +08:00
73ba29e6df
refactor(intr): remove useless tags in the debug log.
2017-09-06 15:20:04 +08:00
c82e51cf79
fix(intr): always assign the same intr to a same source, disable the source only when all the handlers disabled.
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also document handlers sharing a same source.
TW#13454, https://github.com/nodemcu/nodemcu-firmware/issues/1874
Breaking change: handles assigned to a same source should have the same flag now.
2017-09-06 15:20:01 +08:00
d8b66e5088
soc: release interrupts which are not reserved by timers any more
2017-08-28 11:35:27 +08:00
8d43859b6a
esp32: SEGGER SystemView Tracing Support
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Implements support for system level traces compatible with SEGGER
SystemView tool on top of ESP32 application tracing module.
That kind of traces can help to analyse program's behaviour.
SystemView can show timeline of tasks/ISRs execution, context switches,
statistics related to the CPUs' load distribution etc.
Also this commit adds useful feature to ESP32 application tracing module:
- Trace data buffering is implemented to handle temporary peaks of events load
2017-06-27 20:52:43 +03:00
09f7cf45dd
component/bt : fix interrupt number conflict
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1. the typical problem is when push keyboard on serial tool, the bluetooth may stop.
2017-06-15 19:41:54 +08:00
04acc88023
esp32: Fixes watchdog problem when printing core dump to uart
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Also fixes generation of core dumps when flash cache is disabled
2017-02-01 18:39:28 +03:00
f7e2e456e4
intr_alloc: mark inline asm operand as earlyclobber
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When compiling in release mode, compiler was choosing same register for
oldint and intmask variables, so INTENABLE was never modified.
This effectively broke disabling of non-IRAM interrupts during flash
operations, observed in the existing tests if task watchdog is enabled.
This change adds an extra constraint tells the compiler that output
operand should not be placed into the same register as an input one.
2017-01-18 18:31:06 +08:00
3168ad10e7
Core timer 2 is unusable for FreeRTOS ticks because it triggers a high-level interrupt. This commit deletes the option to select it.
2017-01-15 11:11:58 +08:00
a2e0c2432e
esp32: sanity check ISR handler address passed into esp_intr_alloc
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Return ESP_ERR_INVALID_ARG if the handler is not in IRAM (or RTC fast memory)
2017-01-11 11:38:17 +08:00
11a994d5d8
Calling esp_intr_noniram_[en|dis]able twice is an error, so abort instead of doing an assert which disappears in non-debug mode
2017-01-09 12:04:21 +08:00
1597f7a035
Add IRAM_ATTR to esp_intr_{enable,disable}
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So it's safe to invoke from ISR
Signed-off-by: Jeroen Domburg <jeroen@espressif.com>
2016-12-19 18:49:28 +08:00
d5c57d1d10
Put ets_isr_* functions into IRAM. Original fns were in ROM so people may expect them to work when flash cache is out.
2016-12-13 13:24:01 +08:00
78161a1fe3
Replace non-multicore-aware rom funcs with multicore-aware funcs, ESP_LOG->ESP_EARLY_LOG fix, reserve ints used in wireless libs. Fixes WiFi crashing
2016-12-13 13:24:01 +08:00
2c34ab3374
Mark some interrupts that are now allocated dynamically as free, add int handle param documentation, add local ints test
2016-12-08 12:39:33 +08:00
9dc908d105
Add test for local interrupts, fix int disable code
2016-12-08 12:39:33 +08:00
ae8c37e0b6
Add disabling/enabling of shared interrupt, add testcase for interrupts
2016-12-08 12:39:33 +08:00
32fa94935d
Changes according to merge request
2016-12-08 12:39:33 +08:00
655fd2986a
Add interrupt allocation scheme / interrupt sharing. Also modifies drivers and examples. Also allows interrupts
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to be marked specifically as having a handler that's all in IRAM.
2016-12-08 12:39:33 +08:00
Jeroen Domburg