6cc871d793
Merge branch 'feature/ulp_riscv_adc' into 'master'
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ulp-riscv: add support for using ADC as well as an example show-casing it.
Closes IDFGH-7564 and IDF-1714
See merge request espressif/esp-idf!18767
2022-07-11 12:30:31 +08:00
e8b5096f52
ulp-riscv: add support for using ADC as well as an example show-casing it.
2022-07-11 09:31:22 +08:00
a7bf3af687
Merge branch 'bugfix/reset_ble_hw_on_inititalization' into 'master'
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component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
Closes BT-2402
See merge request espressif/esp-idf!18831
2022-07-08 16:21:41 +08:00
a58362a429
Merge branch 'feature/efuse_rev_major_minor' into 'master'
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efuse: Adds major and minor versions
See merge request espressif/esp-idf!18255
2022-07-07 11:48:54 +08:00
b662f4b74f
Merge branch 'feature/support_26M_32M_xtal_bbpll_c2' into 'master'
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support c2 26M/32M xtal for bbpll
Closes IDF-5485
See merge request espressif/esp-idf!18769
2022-07-06 21:17:52 +08:00
a92cce9861
Merge branch 'bugfix/calib_i2c_clk' into 'master'
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I2C: Make I2C clock frequency accurate
Closes IDF-5363
See merge request espressif/esp-idf!18686
2022-07-06 20:52:31 +08:00
1d55f12c2d
component/bt: reset Bluetooth hardware during controller inititalization on ESP32-C3/ESP32-S3
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1. Rename MACROs SYSTEM_WIFI_RST_EN register bit fields to be more recognizable
2. reset Bluetooth baseband and clock bits to fix the issue of task watchdog triggered during controller initialization due to invalid hardware state
2022-07-06 16:23:48 +08:00
e218723e0e
I2C: Make I2C clock frequency accurate
2022-07-06 11:58:08 +08:00
d145c337e0
Enable rpa_moudle reset function
2022-07-05 20:50:31 +08:00
e16165f263
support c2 26M/32M xtal for bbpll
2022-07-05 17:45:03 +08:00
0f8ff5aa15
efuse: Adds major and minor versions and others
2022-07-05 14:38:27 +08:00
7863c1bc45
Merge branch 'bugfix/fix_rtc_freq_err_for_h2_beta1' into 'master'
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Bugfix/fix rtc freq err for h2 beta1
See merge request espressif/esp-idf!18682
2022-07-04 16:46:17 +08:00
cd48baf979
Refactor: move regi2c_*.h header files from esp_hw_support to soc component
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When creating G0 layer, some regi2c_*.h headers were moved out from
esp_hw_support (G1) to soc (G0). In order to be consistent with that change,
move all the remaining regi2c_*.h headers to soc too.
2022-06-30 09:40:44 +00:00
10fd1daa10
Add ETM clk gate defines for h2
2022-06-30 17:02:00 +08:00
e13d7f8351
Merge branch 'bugfix/s2_ap64_psram_crash_issue' into 'master'
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psram: fix esp32s2 module with APS6404 PSRAM crash issue
Closes IDF-5361
See merge request espressif/esp-idf!18699
2022-06-29 11:19:17 +08:00
c51c1a8651
mmu: fix wrong mmu entry id issue
2022-06-28 14:17:44 +08:00
31b3f31ef4
ext_mem: make memory region check strict
2022-06-28 14:17:44 +08:00
7fd9a91034
dma: move from driver to hw_support
2022-06-28 14:17:12 +08:00
dd24639215
Merge branch 'esp32h2/enable_ecc_accelerator' into 'master'
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esp32h2: Enable ECC accelerator
Closes IDF-3397
See merge request espressif/esp-idf!18647
2022-06-23 20:06:26 +08:00
2c0651a671
Add regi2c enable/disable reference count
2022-06-23 15:36:44 +08:00
3a820462ac
temperature_sensor: Add temperature sensor support for ESP32-C2
2022-06-23 15:36:43 +08:00
6cfc9c365f
esp32h2: Enable ECC accelerator
2022-06-23 12:59:13 +05:30
8fae0f0753
G0: Support Xtensa targets for G0-only compilation
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G0-only example now supports Xtensa targets. This means that G0 layer
does not depend on G1+ layers anymore
2022-06-20 11:34:20 +00:00
339fcbf14d
System/Security: Memprot API unified (ESP32S3)
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Unified Memory protection API for all PMS-aware chips - ESP32S3 port
2022-06-20 02:36:44 +00:00
752026a174
Merge branch 'refactor/remove_g0_dep_on_g1_riscv' into 'master'
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G0: RISC-V targets have now an independent G0 layer
See merge request espressif/esp-idf!17926
2022-06-16 11:53:39 +08:00
0b80546f8e
Merge branch 'feature/new_esp_psram_component' into 'master'
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esp_psram: new esp psram component
Closes IDF-4318, IDF-4382, IDF-4841, and IDFGH-7192
See merge request espressif/esp-idf!18050
2022-06-15 19:16:56 +08:00
28b8fc6a7e
i2s: update documents for driver-NG
2022-06-15 10:30:04 +08:00
0fe3bb8ab7
i2s: update examples and unit-tests
2022-06-15 10:29:06 +08:00
621d0aa942
i2s: Introduced a brand new driver
2022-06-15 10:29:06 +08:00
e213e66ba3
Merge branch 'refactor/esp_hw_support_cpu' into 'master'
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esp_hw_support: Add new esp_cpu.h abstraction
Closes IDF-4769
See merge request espressif/esp-idf!17091
2022-06-14 21:11:30 +08:00
919344547b
Merge branch 'bugfix/rmt_register_file_s3' into 'master'
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rmt: update register file after fixing csv of RMT peripheral (esp32s2/s3)
Closes IDFGH-7537
See merge request espressif/esp-idf!18392
2022-06-14 18:24:28 +08:00
7b8e5888ca
Merge branch 'refactor/add_clk_tree_ll' into 'master'
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clk_tree: Stage3 - HAL for clock subsystem
Closes IDF-4334
See merge request espressif/esp-idf!18270
2022-06-14 17:16:29 +08:00
3cb6abee3c
Merge branch 'bugfix/hal_assert_spelling' into 'master'
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HAL: fix kconfig HAL_ASSERTION typo
See merge request espressif/esp-idf!18482
2022-06-14 16:24:25 +08:00
4e33239474
Merge branch 'feature/remove_back_compatible_with_s3beta_rom' into 'master'
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spi_flash: remove back-compatible with caller function of S3Beta ROM
See merge request espressif/esp-idf!18492
2022-06-14 16:22:08 +08:00
38e5043ae8
esp_psram: new psram component
2022-06-14 15:44:27 +08:00
2fd784c97a
G0 RISC-V: Remove "private_include/regi2c_brownout.h" header as it has been moved and simplify "regi2c_ctrl.h"
2022-06-14 15:00:53 +08:00
5bcd9b2db8
G0: RISC-V targets have now an independent G0 layer
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G0 doesn't depend on any G1+ layer for RISC-V based targets
2022-06-14 15:00:53 +08:00
a8a3756b38
hal: Route CPU and Interrupt Controller HAL/LL to esp_cpu calls
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This commit makes changes to cpu_ll.h, cpu_hal.h, and interrupt_controller_hal.h:
- Moved to esp_hw_support in order to be deprecated in the future
- HAL/LL API now route their calls to esp_cpu.h functions instead
Also updated soc_hal.h as follows:
- Removed __SOC_HAL_..._OTHER_CORES() macros as they dependend on cpu_hal.h
- Made soc_hal.h and soc_ll.h interfaces always inline, and removed soc_hal.c.
This commit also updates the XCHAL_ERRATUM_572 workaround by
- Removing it's HAL function and invoking the workaround it directly the bootloader
- Added missing workaround for the ESP32-S3
2022-06-14 14:40:03 +08:00
149872131a
hal: Move dedicated GPIO LL and HAL
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This commit moves the dedicated GPIO LL and HAL functions from
cpu_ll.h to dedic_gpio_cpu_ll.h.
- cpu_ll_enable_cycle_count() has also been removed due to lack of feasible usage scenarios
2022-06-14 14:38:29 +08:00
0e8401e9b0
spi_flash: remove back-compatible with caller function of S3Beta ROM
2022-06-14 11:25:30 +08:00
b2bb8fd3c4
rgb_lcd: support update pclk at runtime
2022-06-14 02:20:47 +00:00
843279d287
rgb_lcd: support fractional clock divisor
2022-06-14 02:20:47 +00:00
6f6251f369
hal: Limit the HAL_ASSERTION_LEVEL in bootloader to be no larger than 1 (i.e. silent)
2022-06-13 17:47:51 +08:00
c8752cee6a
clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem
2022-06-13 17:47:50 +08:00
e18f381905
HAL: fix kconfig HAL_ASSERTION typo
2022-06-13 16:19:28 +08:00
4094f13fd3
rmt: fix error in rmt register file
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Closes https://github.com/espressif/esp-idf/issues/9100
2022-06-10 18:38:42 +08:00
5daa73d236
Merge branch 'refactor/mcpwm_hal_driver_doc' into 'master'
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mcpwm: don't support disable carrier one-shot pulse
Closes IDFGH-7406
See merge request espressif/esp-idf!18295
2022-06-10 10:28:59 +08:00
6589daabb9
MMU: Add configurable mmu page size support on ESP32C2
2022-06-08 19:34:31 +08:00
773715d900
Merge branch 'feature/support_refresh_brownout_v1' into 'master'
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spi_flash: send reset when brownout detected on XMC flash
Closes IDF-3882
See merge request espressif/esp-idf!16873
2022-06-06 16:27:58 +08:00
c1505d045c
Add periph_module needed for BT
2022-06-03 21:47:58 +08:00
Marius Vikhammer