diff --git a/components/soc/esp32s2/include/soc/rtc.h b/components/soc/esp32s2/include/soc/rtc.h
index f14c77650e..15156da858 100644
--- a/components/soc/esp32s2/include/soc/rtc.h
+++ b/components/soc/esp32s2/include/soc/rtc.h
@@ -57,7 +57,7 @@ extern "C" {
 #define RTC_SLOW_CLK_8MD256_CAL_TIMEOUT_THRES(cycles)  (cycles << 12)
 #define RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(cycles)  (cycles << 10)
 
-#define RTC_SLOW_CLK_FREQ_150K      150000
+#define RTC_SLOW_CLK_FREQ_90K      90000
 #define RTC_SLOW_CLK_FREQ_8MD256    (RTC_FAST_CLK_FREQ_APPROX / 256)
 #define RTC_SLOW_CLK_FREQ_32K       32768
 
diff --git a/components/soc/esp32s2/rtc_clk.c b/components/soc/esp32s2/rtc_clk.c
index b65a0cb61e..0d0ce595c0 100644
--- a/components/soc/esp32s2/rtc_clk.c
+++ b/components/soc/esp32s2/rtc_clk.c
@@ -208,7 +208,7 @@ rtc_slow_freq_t rtc_clk_slow_freq_get(void)
 uint32_t rtc_clk_slow_freq_get_hz(void)
 {
     switch (rtc_clk_slow_freq_get()) {
-    case RTC_SLOW_FREQ_RTC: return RTC_SLOW_CLK_FREQ_150K;
+    case RTC_SLOW_FREQ_RTC: return RTC_SLOW_CLK_FREQ_90K;
     case RTC_SLOW_FREQ_32K_XTAL: return RTC_SLOW_CLK_FREQ_32K;
     case RTC_SLOW_FREQ_8MD256: return RTC_SLOW_CLK_FREQ_8MD256;
     }
diff --git a/components/soc/esp32s2/rtc_time.c b/components/soc/esp32s2/rtc_time.c
index 4db6a13f97..c9e190aa8c 100644
--- a/components/soc/esp32s2/rtc_time.c
+++ b/components/soc/esp32s2/rtc_time.c
@@ -71,7 +71,7 @@ uint32_t rtc_clk_cal_internal(rtc_cal_sel_t cal_clk, uint32_t slowclk_cycles)
         expected_freq = RTC_SLOW_CLK_FREQ_8MD256;
     } else {
         REG_SET_FIELD(TIMG_RTCCALICFG2_REG(0), TIMG_RTC_CALI_TIMEOUT_THRES, RTC_SLOW_CLK_150K_CAL_TIMEOUT_THRES(slowclk_cycles));
-        expected_freq = RTC_SLOW_CLK_FREQ_150K;
+        expected_freq = RTC_SLOW_CLK_FREQ_90K;
     }
     uint32_t us_time_estimate = (uint32_t) (((uint64_t) slowclk_cycles) * MHZ / expected_freq);
     /* Start calibration */