From 04f7c342f036da8448091a31a7d72b571e9213b6 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Tue, 17 May 2022 16:36:40 +0800 Subject: [PATCH] I2C: patch for solving watchdog timeout issue --- components/driver/i2c.c | 13 +++++++++++++ components/soc/esp32c3/include/soc/soc_caps.h | 2 +- components/soc/esp32h2/include/soc/soc_caps.h | 2 +- components/soc/esp32s2/include/soc/soc_caps.h | 3 +-- components/soc/esp32s3/include/soc/i2c_caps.h | 3 +-- 5 files changed, 17 insertions(+), 6 deletions(-) diff --git a/components/driver/i2c.c b/components/driver/i2c.c index 4aa710c733..bd9c1fc30d 100644 --- a/components/driver/i2c.c +++ b/components/driver/i2c.c @@ -476,6 +476,14 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg) { i2c_obj_t *p_i2c = (i2c_obj_t *) arg; int i2c_num = p_i2c->i2c_num; + // Interrupt protection. + // On C3 and S3 targets, the I2C may trigger a spurious interrupt, + // in order to detect these false positive, check the I2C's hardware interrupt mask + uint32_t int_mask; + i2c_hal_get_intsts_mask(&(i2c_context[i2c_num].hal), &int_mask); + if (int_mask == 0) { + return; + } i2c_intr_event_t evt_type = I2C_INTR_EVENT_ERR; portBASE_TYPE HPTaskAwoken = pdFALSE; if (p_i2c->mode == I2C_MODE_MASTER) { @@ -499,6 +507,9 @@ static void IRAM_ATTR i2c_isr_handler_default(void *arg) if (p_i2c->status != I2C_STATUS_ACK_ERROR && p_i2c->status != I2C_STATUS_IDLE) { i2c_master_cmd_begin_static(i2c_num); } + } else { + // Do nothing if there is no proper event. + return; } i2c_cmd_evt_t evt = { .type = I2C_CMD_EVT_ALIVE @@ -596,6 +607,8 @@ static esp_err_t i2c_master_clear_bus(i2c_port_t i2c_num) **/ static esp_err_t i2c_hw_fsm_reset(i2c_port_t i2c_num) { +// A workaround for avoiding cause timeout issue when using +// hardware reset. #if !SOC_I2C_SUPPORT_HW_FSM_RST int scl_low_period, scl_high_period; int scl_start_hold, scl_rstart_setup; diff --git a/components/soc/esp32c3/include/soc/soc_caps.h b/components/soc/esp32c3/include/soc/soc_caps.h index 33503c0284..66cf2c6ad4 100644 --- a/components/soc/esp32c3/include/soc/soc_caps.h +++ b/components/soc/esp32c3/include/soc/soc_caps.h @@ -127,7 +127,7 @@ #define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ -#define SOC_I2C_SUPPORT_HW_FSM_RST (1) +// FSM_RST only resets the FSM, not using it. So SOC_I2C_SUPPORT_HW_FSM_RST not defined. #define SOC_I2C_SUPPORT_HW_CLR_BUS (1) #define SOC_I2C_SUPPORT_XTAL (1) diff --git a/components/soc/esp32h2/include/soc/soc_caps.h b/components/soc/esp32h2/include/soc/soc_caps.h index 629834b868..a480ff561f 100644 --- a/components/soc/esp32h2/include/soc/soc_caps.h +++ b/components/soc/esp32h2/include/soc/soc_caps.h @@ -115,7 +115,7 @@ #define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ -#define SOC_I2C_SUPPORT_HW_FSM_RST (1) +// FSM_RST only resets the FSM, not using it. So SOC_I2C_SUPPORT_HW_FSM_RST not defined. #define SOC_I2C_SUPPORT_HW_CLR_BUS (1) #define SOC_I2C_SUPPORT_XTAL (1) diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index 2d311893dd..d2671cb6d2 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -127,8 +127,7 @@ #define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ -//ESP32-S2 support hardware FSM reset -#define SOC_I2C_SUPPORT_HW_FSM_RST (1) +// FSM_RST only resets the FSM, not using it. So SOC_I2C_SUPPORT_HW_FSM_RST not defined. //ESP32-S2 support hardware clear bus #define SOC_I2C_SUPPORT_HW_CLR_BUS (1) diff --git a/components/soc/esp32s3/include/soc/i2c_caps.h b/components/soc/esp32s3/include/soc/i2c_caps.h index 71ef195bb0..6e566ca01a 100644 --- a/components/soc/esp32s3/include/soc/i2c_caps.h +++ b/components/soc/esp32s3/include/soc/i2c_caps.h @@ -23,8 +23,7 @@ extern "C" { #define SOC_I2C_FIFO_LEN (32) /*!< I2C hardware FIFO depth */ -//ESP32-S3 support hardware FSM reset -#define SOC_I2C_SUPPORT_HW_FSM_RST (1) +// FSM_RST only resets the FSM, not using it. So SOC_I2C_SUPPORT_HW_FSM_RST not defined. //ESP32-S3 support hardware clear bus #define SOC_I2C_SUPPORT_HW_CLR_BUS (1)