kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/add_len_check_per_spi_master_transaction_v5.1' into 'release/v5.1'
spi master: added transaction length check to refuse longer than hardware supported length (v5.1) See merge request espressif/esp-idf!23747pull/11519/head
commit
f79088f115
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@ -111,6 +111,7 @@ We have two bits to control the interrupt:
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*/
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#include <string.h>
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#include <sys/param.h>
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#include "esp_private/spi_common_internal.h"
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#include "driver/spi_master.h"
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#include "esp_clk_tree.h"
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@ -123,9 +124,9 @@ We have two bits to control the interrupt:
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#include "soc/soc_memory_layout.h"
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#include "driver/gpio.h"
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#include "hal/spi_hal.h"
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#include "hal/spi_ll.h"
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#include "esp_heap_caps.h"
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typedef struct spi_device_t spi_device_t;
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/// struct to hold private transaction data (like tx and rx buffer for DMA).
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@ -803,6 +804,14 @@ static SPI_MASTER_ISR_ATTR esp_err_t check_trans_valid(spi_device_handle_t handl
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//Dummy phase is not available when both data out and in are enabled, regardless of FD or HD mode.
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SPI_CHECK(!tx_enabled || !rx_enabled || !dummy_enabled || !extra_dummy_enabled, "Dummy phase is not available when both data out and in are enabled", ESP_ERR_INVALID_ARG);
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if (bus_attr->dma_enabled) {
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SPI_CHECK(trans_desc->length <= SPI_LL_DMA_MAX_BIT_LEN, "txdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
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SPI_CHECK(trans_desc->rxlength <= SPI_LL_DMA_MAX_BIT_LEN, "rxdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
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} else {
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SPI_CHECK(trans_desc->length <= SPI_LL_CPU_MAX_BIT_LEN, "txdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
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SPI_CHECK(trans_desc->rxlength <= SPI_LL_CPU_MAX_BIT_LEN, "rxdata transfer > hardware max supported len", ESP_ERR_INVALID_ARG);
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}
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return ESP_OK;
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}
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@ -1102,3 +1111,20 @@ esp_err_t SPI_MASTER_ISR_ATTR spi_device_polling_transmit(spi_device_handle_t ha
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return spi_device_polling_end(handle, portMAX_DELAY);
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}
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esp_err_t spi_bus_get_max_transaction_len(spi_host_device_t host_id, size_t *max_bytes)
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{
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SPI_CHECK(is_valid_host(host_id), "invalid host", ESP_ERR_INVALID_ARG);
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if (bus_driver_ctx[host_id] == NULL || max_bytes == NULL) {
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return ESP_ERR_INVALID_ARG;
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}
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spi_host_t *host = bus_driver_ctx[host_id];
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if (host->bus_attr->dma_enabled) {
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*max_bytes = MIN(host->bus_attr->max_transfer_sz, (SPI_LL_DMA_MAX_BIT_LEN / 8));
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} else {
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*max_bytes = MIN(host->bus_attr->max_transfer_sz, (SPI_LL_CPU_MAX_BIT_LEN / 8));
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}
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return ESP_OK;
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}
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@ -391,6 +391,18 @@ void spi_get_timing(bool gpio_is_used, int input_delay_ns, int eff_clk, int *dum
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*/
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int spi_get_freq_limit(bool gpio_is_used, int input_delay_ns);
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/**
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* @brief Get max length (in bytes) of one transaction
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*
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* @param host_id SPI peripheral
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* @param[out] max_bytes Max length of one transaction, in bytes
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*
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* @return
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* - ESP_OK: On success
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* - ESP_ERR_INVALID_ARG: Invalid argument
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*/
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esp_err_t spi_bus_get_max_transaction_len(spi_host_device_t host_id, size_t *max_bytes);
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#ifdef __cplusplus
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}
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#endif
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@ -21,7 +21,6 @@
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#include "esp_log.h"
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#include "esp_check.h"
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#include "esp_lcd_common.h"
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#include "esp_private/spi_common_internal.h"
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static const char *TAG = "lcd_panel.io.spi";
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@ -107,9 +106,13 @@ esp_err_t esp_lcd_new_panel_io_spi(esp_lcd_spi_bus_handle_t bus, const esp_lcd_p
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spi_panel_io->base.tx_color = panel_io_spi_tx_color;
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spi_panel_io->base.del = panel_io_spi_del;
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spi_panel_io->base.register_event_callbacks = panel_io_spi_register_event_callbacks;
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spi_panel_io->spi_trans_max_bytes = spi_bus_get_attr((spi_host_device_t)bus)->max_transfer_sz;
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size_t max_trans_bytes = 0;
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ESP_GOTO_ON_ERROR(spi_bus_get_max_transaction_len((spi_host_device_t)bus, &max_trans_bytes), err, TAG, "get spi max transaction len failed");
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spi_panel_io->spi_trans_max_bytes = max_trans_bytes;
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*ret_io = &(spi_panel_io->base);
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ESP_LOGD(TAG, "new spi lcd panel io @%p", spi_panel_io);
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ESP_LOGD(TAG, "new spi lcd panel io @%p, max_trans_bytes: %d", spi_panel_io, (int)max_trans_bytes);
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return ESP_OK;
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@ -39,7 +39,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? &SPI1:((ID)==1? &SPI2 : &SPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 24)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 24) //reg len: 24 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -38,7 +38,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -38,7 +38,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -39,7 +39,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -41,7 +41,8 @@ extern "C" {
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#define SPI_LL_PERIPH_CLK_FREQ (80 * 1000000)
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):&GPSPI2)
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -41,7 +41,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 23)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 23) //reg len: 23 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (18 * 32) //Fifo len: 18 words
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/**
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* The data structure holding calculated clock configuration. Since the
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@ -40,7 +40,8 @@ extern "C" {
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#define HAL_SPI_SWAP_DATA_TX(data, len) HAL_SWAP32((uint32_t)(data) << (32 - len))
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#define SPI_LL_GET_HW(ID) ((ID)==0? ({abort();NULL;}):((ID)==1? &GPSPI2 : &GPSPI3))
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#define SPI_LL_DATA_MAX_BIT_LEN (1 << 18)
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#define SPI_LL_DMA_MAX_BIT_LEN (1 << 18) //reg len: 18 bits
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#define SPI_LL_CPU_MAX_BIT_LEN (16 * 32) //Fifo len: 16 words
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/**
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* The data structure holding calculated clock configuration. Since the
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