diff --git a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c index cfaa5e02bd..f765e52a65 100644 --- a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c +++ b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_probe_spi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -40,11 +40,9 @@ TEST_CASE("sdspi probe, slot 1", "[sdspi]") do_one_sdspi_probe(SLOT_1, SDMMC_FREQ_CUSTOM_10M); } -#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3 -//TODO: IDF-8749 -//here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 TEST_CASE("sdspi probe, slot 1, HS", "[sdspi]") { + //TODO: IDF-8749 + //here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 do_one_sdspi_probe(SLOT_1, SDMMC_FREQ_DEFAULT); } -#endif diff --git a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c index a45e5f0c13..916498b3c9 100644 --- a/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c +++ b/components/esp_driver_sdspi/test_apps/sdspi/components/sdspi_tests/sdmmc_test_rw_spi.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -26,14 +26,12 @@ TEST_CASE("sdspi read/write performance, slot 0", "[sdspi]") do_one_sdspi_perf_test(SLOT_0, SDMMC_FREQ_HIGHSPEED); } -#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3 -//TODO: IDF-8749 -//here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 TEST_CASE("sdspi read/write performance, slot 1", "[sdspi]") { + //TODO: IDF-8749 + //here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 do_one_sdspi_perf_test(SLOT_1, SDMMC_FREQ_DEFAULT); } -#endif /* ========== Read/write tests with offset, SPI ========== */ @@ -52,14 +50,12 @@ TEST_CASE("sdspi read/write performance with offset, slot 0", "[sdspi]") do_one_sdspi_rw_test_with_offset(SLOT_0, SDMMC_FREQ_HIGHSPEED); } -#if !CONFIG_IDF_TARGET_ESP32 && !CONFIG_IDF_TARGET_ESP32S3 -//TODO: IDF-8749 -//here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 TEST_CASE("sdspi read/write performance with offset, slot 1", "[sdspi]") { + //TODO: IDF-8749 + //here freq should be changed to SDMMC_FREQ_HIGHSPEED after fixing IDF-8749 do_one_sdspi_rw_test_with_offset(SLOT_1, SDMMC_FREQ_DEFAULT); } -#endif /* ========== Read/write tests with unaligned source/destination buffer, SPI ========== */