kopia lustrzana https://github.com/espressif/esp-idf
Rename SPI Master IO pins to more common terminology, add better explanation to queue_length initialization value
Jeroen Domburg
rodzic
5eb8eb3855
commit
ee59fa75f4
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@ -46,11 +46,11 @@ typedef enum {
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* the IO_MUX or are -1. In that case, the IO_MUX is used, allowing for >40MHz speeds.
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*/
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typedef struct {
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int spid_io_num; ///< GPIO pin for spi_d (=MOSI)signal, or -1 if not used.
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int spiq_io_num; ///< GPIO pin for spi_q (=MISO) signal, or -1 if not used.
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int spiclk_io_num; ///< GPIO pin for spi_clk signal, or -1 if not used.
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int spiwp_io_num; ///< GPIO pin for spi_wp signal, or -1 if not used.
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int spihd_io_num; ///< GPIO pin for spi_hd signal, or -1 if not used.
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int mosi_io_num; ///< GPIO pin for Master Out Slave In (=spi_d) signal, or -1 if not used.
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int miso_io_num; ///< GPIO pin for Master In Slave Out (=spi_q) signal, or -1 if not used.
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int sclk_io_num; ///< GPIO pin for Spi CLocK signal, or -1 if not used.
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int quadwp_io_num; ///< GPIO pin for WP (Write Protect) signal which is used as D2 in 4-bit communication modes, or -1 if not used.
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int quadhd_io_num; ///< GPIO pin for HD (HolD) signal which is used as D3 in 4-bit communication modes, or -1 if not used.
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} spi_bus_config_t;
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@ -80,7 +80,7 @@ typedef struct {
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int clock_speed_hz; ///< Clock speed, in Hz
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int spics_io_num; ///< CS GPIO pin for this device, or -1 if not used
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uint32_t flags; ///< Bitwise OR of SPI_DEVICE_* flags
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int queue_size; ///< Transaction queue size
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int queue_size; ///< Transaction queue size. This sets how many transactions can be 'in the air' (queued using spi_device_queue_trans but not yet finished using spi_device_get_trans_result) at the same time
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transaction_cb_t pre_cb; ///< Callback to be called before a transmission is started. This callback is called within interrupt context.
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transaction_cb_t post_cb; ///< Callback to be called after a transmission has completed. This callback is called within interrupt context.
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} spi_device_interface_config_t;
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@ -200,11 +200,11 @@ esp_err_t spi_bus_initialize(spi_host_device_t host, spi_bus_config_t *bus_confi
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SPI_CHECK(host>=SPI_HOST && host<=VSPI_HOST, "invalid host", ESP_ERR_INVALID_ARG);
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SPI_CHECK(spihost[host]==NULL, "host already in use", ESP_ERR_INVALID_STATE);
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SPI_CHECK(bus_config->spid_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->spid_io_num), "spid pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->spiclk_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->spiclk_io_num), "spiclk pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->spiq_io_num<0 || GPIO_IS_VALID_GPIO(bus_config->spiq_io_num), "spiq pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->spiwp_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->spiwp_io_num), "spiwp pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->spihd_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->spihd_io_num), "spihd pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->mosi_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->mosi_io_num), "spid pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->sclk_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->sclk_io_num), "spiclk pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->miso_io_num<0 || GPIO_IS_VALID_GPIO(bus_config->miso_io_num), "spiq pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->quadwp_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->quadwp_io_num), "spiwp pin invalid", ESP_ERR_INVALID_ARG);
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SPI_CHECK(bus_config->quadhd_io_num<0 || GPIO_IS_VALID_OUTPUT_GPIO(bus_config->quadhd_io_num), "spihd pin invalid", ESP_ERR_INVALID_ARG);
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//The host struct contains two dma descriptors, so we need DMA'able memory for this.
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spihost[host]=pvPortMallocCaps(sizeof(spi_host_t), MALLOC_CAP_DMA);
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@ -212,51 +212,51 @@ esp_err_t spi_bus_initialize(spi_host_device_t host, spi_bus_config_t *bus_confi
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memset(spihost[host], 0, sizeof(spi_host_t));
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//Check if the selected pins correspond to the native pins of the peripheral
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if (bus_config->spid_io_num >= 0 && bus_config->spid_io_num!=io_signal[host].spid_native) native=false;
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if (bus_config->spiq_io_num >= 0 && bus_config->spiq_io_num!=io_signal[host].spiq_native) native=false;
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if (bus_config->spiclk_io_num >= 0 && bus_config->spiclk_io_num!=io_signal[host].spiclk_native) native=false;
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if (bus_config->spiwp_io_num >= 0 && bus_config->spiwp_io_num!=io_signal[host].spiwp_native) native=false;
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if (bus_config->spihd_io_num >= 0 && bus_config->spihd_io_num!=io_signal[host].spihd_native) native=false;
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if (bus_config->mosi_io_num >= 0 && bus_config->mosi_io_num!=io_signal[host].spid_native) native=false;
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if (bus_config->miso_io_num >= 0 && bus_config->miso_io_num!=io_signal[host].spiq_native) native=false;
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if (bus_config->sclk_io_num >= 0 && bus_config->sclk_io_num!=io_signal[host].spiclk_native) native=false;
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if (bus_config->quadwp_io_num >= 0 && bus_config->quadwp_io_num!=io_signal[host].spiwp_native) native=false;
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if (bus_config->quadhd_io_num >= 0 && bus_config->quadhd_io_num!=io_signal[host].spihd_native) native=false;
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spihost[host]->no_gpio_matrix=native;
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if (native) {
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//All SPI native pin selections resolve to 1, so we put that here instead of trying to figure
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//out which FUNC_GPIOx_xSPIxx to grab; they all are defined to 1 anyway.
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if (bus_config->spid_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spid_io_num], 1);
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if (bus_config->spiq_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiq_io_num], 1);
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if (bus_config->spiwp_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiwp_io_num], 1);
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if (bus_config->spihd_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spihd_io_num], 1);
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if (bus_config->spiclk_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiclk_io_num], 1);
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if (bus_config->mosi_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], 1);
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if (bus_config->miso_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->miso_io_num], 1);
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if (bus_config->quadwp_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], 1);
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if (bus_config->quadhd_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], 1);
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if (bus_config->sclk_io_num > 0) PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], 1);
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} else {
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//Use GPIO
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if (bus_config->spid_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spid_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->spid_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->spid_io_num, io_signal[host].spid_out, false, false);
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gpio_matrix_in(bus_config->spid_io_num, io_signal[host].spid_in, false);
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if (bus_config->mosi_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->mosi_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->mosi_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->mosi_io_num, io_signal[host].spid_out, false, false);
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gpio_matrix_in(bus_config->mosi_io_num, io_signal[host].spid_in, false);
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}
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if (bus_config->spiq_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiq_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->spiq_io_num, GPIO_MODE_INPUT);
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gpio_matrix_out(bus_config->spiq_io_num, io_signal[host].spiq_out, false, false);
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gpio_matrix_in(bus_config->spiq_io_num, io_signal[host].spiq_in, false);
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if (bus_config->miso_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->miso_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->miso_io_num, GPIO_MODE_INPUT);
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gpio_matrix_out(bus_config->miso_io_num, io_signal[host].spiq_out, false, false);
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gpio_matrix_in(bus_config->miso_io_num, io_signal[host].spiq_in, false);
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}
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if (bus_config->spiwp_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiwp_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->spiwp_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->spiwp_io_num, io_signal[host].spiwp_out, false, false);
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gpio_matrix_in(bus_config->spiwp_io_num, io_signal[host].spiwp_in, false);
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if (bus_config->quadwp_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadwp_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->quadwp_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->quadwp_io_num, io_signal[host].spiwp_out, false, false);
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gpio_matrix_in(bus_config->quadwp_io_num, io_signal[host].spiwp_in, false);
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}
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if (bus_config->spihd_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spihd_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->spihd_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->spihd_io_num, io_signal[host].spihd_out, false, false);
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gpio_matrix_in(bus_config->spihd_io_num, io_signal[host].spihd_in, false);
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if (bus_config->quadhd_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->quadhd_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->quadhd_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->quadhd_io_num, io_signal[host].spihd_out, false, false);
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gpio_matrix_in(bus_config->quadhd_io_num, io_signal[host].spihd_in, false);
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}
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if (bus_config->spiclk_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->spiclk_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->spiclk_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->spiclk_io_num, io_signal[host].spiclk_out, false, false);
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if (bus_config->sclk_io_num>0) {
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PIN_FUNC_SELECT(GPIO_PIN_MUX_REG[bus_config->sclk_io_num], PIN_FUNC_GPIO);
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gpio_set_direction(bus_config->sclk_io_num, GPIO_MODE_OUTPUT);
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gpio_matrix_out(bus_config->sclk_io_num, io_signal[host].spiclk_out, false, false);
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}
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}
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periph_module_enable(io_signal[host].module);
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@ -21,11 +21,11 @@
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TEST_CASE("SPI Master test", "[spi]")
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{
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spi_bus_config_t buscfg={
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.spid_io_num=4,
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.spiq_io_num=16,
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.spiclk_io_num=25,
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.spiwp_io_num=-1,
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.spihd_io_num=-1
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.mosi_io_num=4,
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.miso_io_num=16,
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.sclk_io_num=25,
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.quadwp_io_num=-1,
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.quadhd_io_num=-1
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};
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spi_device_interface_config_t devcfg={
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.command_bits=8,
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@ -33,8 +33,6 @@ TEST_CASE("SPI Master test", "[spi]")
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.dummy_bits=0,
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.clock_speed_hz=8000,
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.duty_cycle_pos=128,
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.cs_ena_pretrans=7,
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.cs_ena_posttrans=7,
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.mode=0,
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.spics_io_num=21,
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.queue_size=3
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@ -249,11 +249,11 @@ void app_main()
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esp_err_t ret;
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spi_device_handle_t spi;
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spi_bus_config_t buscfg={
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.spiq_io_num=PIN_NUM_MISO,
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.spid_io_num=PIN_NUM_MOSI,
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.spiclk_io_num=PIN_NUM_CLK,
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.spiwp_io_num=-1,
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.spihd_io_num=-1
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.miso_io_num=PIN_NUM_MISO,
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.mosi_io_num=PIN_NUM_MOSI,
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.sclk_io_num=PIN_NUM_CLK,
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.quadwp_io_num=-1,
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.quadhd_io_num=-1
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};
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spi_device_interface_config_t devcfg={
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.clock_speed_hz=10000000, //Clock out at 10 MHz
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