diff --git a/components/esp_phy/src/phy_init.c b/components/esp_phy/src/phy_init.c
index e71969e7aa..5b86bff258 100644
--- a/components/esp_phy/src/phy_init.c
+++ b/components/esp_phy/src/phy_init.c
@@ -284,11 +284,18 @@ void IRAM_ATTR esp_wifi_bt_power_domain_on(void)
     _lock_acquire(&s_wifi_bt_pd_controller.lock);
     if (s_wifi_bt_pd_controller.count++ == 0) {
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_PWC_REG, RTC_CNTL_WIFI_FORCE_PD);
-#if !CONFIG_IDF_TARGET_ESP32
+        esp_rom_delay_us(10);
+        wifi_bt_common_module_enable();
+#if CONFIG_IDF_TARGET_ESP32
+        DPORT_SET_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
+        DPORT_CLEAR_PERI_REG_MASK(DPORT_CORE_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
+#else
+        // modem reset when power on
         SET_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
         CLEAR_PERI_REG_MASK(SYSCON_WIFI_RST_EN_REG, MODEM_RESET_FIELD_WHEN_PU);
 #endif
         CLEAR_PERI_REG_MASK(RTC_CNTL_DIG_ISO_REG, RTC_CNTL_WIFI_FORCE_ISO);
+        wifi_bt_common_module_disable();
     }
     _lock_release(&s_wifi_bt_pd_controller.lock);
 }
diff --git a/components/soc/esp32/include/soc/dport_reg.h b/components/soc/esp32/include/soc/dport_reg.h
index 66820b0e05..e6a5130078 100644
--- a/components/soc/esp32/include/soc/dport_reg.h
+++ b/components/soc/esp32/include/soc/dport_reg.h
@@ -1088,8 +1088,10 @@
 #define DPORT_RW_BTMAC_RST     BIT(9)
 #define DPORT_RW_BTLP_RST      BIT(10)
 
+//ESP32 should not reset FE in esp_wifi_bt_power_domain_on().
+//The FE of ESP32 is not in the WIFI PD power domain.
+//When turning off WIFI PD, the FE will not power down, so phy_wakeup_init() did not rewrite the FE register.
 #define MODEM_RESET_FIELD_WHEN_PU   (DPORT_WIFIBB_RST       | \
-                                     DPORT_FE_RST           | \
                                      DPORT_WIFIMAC_RST      | \
                                      DPORT_BTBB_RST         | \
                                      DPORT_BTMAC_RST        | \
diff --git a/components/soc/esp32s2/include/soc/syscon_reg.h b/components/soc/esp32s2/include/soc/syscon_reg.h
index 91d9e15375..62e031b55b 100644
--- a/components/soc/esp32s2/include/soc/syscon_reg.h
+++ b/components/soc/esp32s2/include/soc/syscon_reg.h
@@ -443,7 +443,8 @@ extern "C" {
 #define DPORT_WIFI_CLK_BT_EN_V  0x61
 #define DPORT_WIFI_CLK_BT_EN_S  11
 /* Mask for clock bits used by both WIFI and Bluetooth, bit 0, 3, 6, 7, 8, 9 */
-#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
+#define SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M 0x000003c9
+#define DPORT_WIFI_CLK_WIFI_BT_COMMON_M SYSTEM_WIFI_CLK_WIFI_BT_COMMON_M
 
 /* Digital team to check */
 //bluetooth baseband bit11