From deea402cf487f70e9ce7f1b279a8f6fafa190b6c Mon Sep 17 00:00:00 2001 From: morris Date: Wed, 11 Nov 2020 19:54:04 +0800 Subject: [PATCH 1/2] timer: pooling update bit before reading count value --- components/hal/esp32/include/hal/timer_ll.h | 1 + components/hal/esp32s2/include/hal/timer_ll.h | 1 + components/hal/esp32s3/include/hal/timer_ll.h | 1 + 3 files changed, 3 insertions(+) diff --git a/components/hal/esp32/include/hal/timer_ll.h b/components/hal/esp32/include/hal/timer_ll.h index 2ec4286f77..447f3fded9 100644 --- a/components/hal/esp32/include/hal/timer_ll.h +++ b/components/hal/esp32/include/hal/timer_ll.h @@ -103,6 +103,7 @@ static inline void timer_ll_set_counter_value(timg_dev_t *hw, timer_idx_t timer_ FORCE_INLINE_ATTR void timer_ll_get_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *timer_val) { hw->hw_timer[timer_num].update = 1; + while (hw->hw_timer[timer_num].update) {} *timer_val = ((uint64_t) hw->hw_timer[timer_num].cnt_high << 32) | (hw->hw_timer[timer_num].cnt_low); } diff --git a/components/hal/esp32s2/include/hal/timer_ll.h b/components/hal/esp32s2/include/hal/timer_ll.h index 6a9a235f8a..3e8bc1930f 100644 --- a/components/hal/esp32s2/include/hal/timer_ll.h +++ b/components/hal/esp32s2/include/hal/timer_ll.h @@ -99,6 +99,7 @@ static inline void timer_ll_set_counter_value(timg_dev_t *hw, timer_idx_t timer_ FORCE_INLINE_ATTR void timer_ll_get_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *timer_val) { hw->hw_timer[timer_num].update.update = 1; + while (hw->hw_timer[timer_num].update.update) {} *timer_val = ((uint64_t) hw->hw_timer[timer_num].cnt_high << 32) | (hw->hw_timer[timer_num].cnt_low); } diff --git a/components/hal/esp32s3/include/hal/timer_ll.h b/components/hal/esp32s3/include/hal/timer_ll.h index ced9251201..994cb48faf 100644 --- a/components/hal/esp32s3/include/hal/timer_ll.h +++ b/components/hal/esp32s3/include/hal/timer_ll.h @@ -100,6 +100,7 @@ static inline void timer_ll_set_counter_value(timg_dev_t *hw, timer_idx_t timer_ FORCE_INLINE_ATTR void timer_ll_get_counter_value(timg_dev_t *hw, timer_idx_t timer_num, uint64_t *timer_val) { hw->hw_timer[timer_num].update.update = 1; + while (hw->hw_timer[timer_num].update.update) {} *timer_val = ((uint64_t) hw->hw_timer[timer_num].cnt_high.hi << 32) | (hw->hw_timer[timer_num].cnt_low); } From dc227c78e12c307b573b57c1d8f8a21f32e7eb9c Mon Sep 17 00:00:00 2001 From: morris Date: Wed, 11 Nov 2020 20:09:04 +0800 Subject: [PATCH 2/2] rmt: fix wrong signal assign on esp32 --- components/soc/esp32/rmt_periph.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/components/soc/esp32/rmt_periph.c b/components/soc/esp32/rmt_periph.c index 0228af8a53..98a9c7b7ae 100644 --- a/components/soc/esp32/rmt_periph.c +++ b/components/soc/esp32/rmt_periph.c @@ -22,35 +22,35 @@ const rmt_signal_conn_t rmt_periph_signals = { .channels = { [0] = { .tx_sig = RMT_SIG_OUT0_IDX, - .rx_sig = -1 + .rx_sig = RMT_SIG_IN0_IDX }, [1] = { .tx_sig = RMT_SIG_OUT1_IDX, - .rx_sig = -1 + .rx_sig = RMT_SIG_IN1_IDX }, [2] = { .tx_sig = RMT_SIG_OUT2_IDX, - .rx_sig = -1 + .rx_sig = RMT_SIG_IN2_IDX }, [3] = { .tx_sig = RMT_SIG_OUT3_IDX, - .rx_sig = -1 + .rx_sig = RMT_SIG_IN3_IDX }, [4] = { - .tx_sig = -1, - .rx_sig = RMT_SIG_IN0_IDX + .tx_sig = RMT_SIG_OUT4_IDX, + .rx_sig = RMT_SIG_IN4_IDX }, [5] = { - .tx_sig = -1, - .rx_sig = RMT_SIG_IN1_IDX + .tx_sig = RMT_SIG_OUT5_IDX, + .rx_sig = RMT_SIG_IN5_IDX }, [6] = { - .tx_sig = -1, - .rx_sig = RMT_SIG_IN2_IDX + .tx_sig = RMT_SIG_OUT6_IDX, + .rx_sig = RMT_SIG_IN6_IDX }, [7] = { - .tx_sig = -1, - .rx_sig = RMT_SIG_IN3_IDX + .tx_sig = RMT_SIG_OUT7_IDX, + .rx_sig = RMT_SIG_IN7_IDX } } };