kopia lustrzana https://github.com/espressif/esp-idf
tools: use riscv32-esp-elf toolchain for ESP32-S2 RISC-V ULP
riscv32-esp-elf toolchain (used for ESP32-C3) can also be used for ESP32-S2 RISC-V ULP coprocessor. This removes the riscv-none-embed-gcc toolchain which was originally used for the ULP, and updates the docs and CMake files to use riscv32-esp-elf. Some flags are cleaned up and workarounds removed from CMake toolchain file.pull/6365/head
rodzic
39cbf2f7ed
commit
de798541dc
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@ -1,18 +1,15 @@
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# CMake toolchain file for ULP-RISC-V
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set(CMAKE_SYSTEM_NAME Generic)
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# Not best solution, needs to figure why the compiler detection
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# fails in CI
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set(CMAKE_C_COMPILER_FORCED TRUE)
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set(CMAKE_CXX_COMPILER_FORCED TRUE)
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set(CMAKE_C_COMPILER "riscv32-esp-elf-gcc")
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set(CMAKE_CXX_COMPILER "riscv32-esp-elf-g++")
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set(CMAKE_ASM_COMPILER "riscv32-esp-elf-gcc")
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set(CMAKE_C_COMPILER "riscv-none-embed-gcc")
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set(CMAKE_ASM_COMPILER "riscv-none-embed-gcc")
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if(NOT ASM_DIALECT)
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set(ASM_DIALECT "")
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endif()
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set(CMAKE_C_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections")
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set(CMAKE_ASM_FLAGS "-march=rv32imc -mdiv -x assembler-with-cpp -fdata-sections -ffunction-sections")
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set(CMAKE_EXE_LINKER_FLAGS "-march=rv32imc --specs=nano.specs --specs=nosys.specs")
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set(CMAKE_C_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections"
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CACHE STRING "C Compiler Base Flags")
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set(CMAKE_CXX_FLAGS "-Os -march=rv32imc -mdiv -fdata-sections -ffunction-sections"
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CACHE STRING "C++ Compiler Base Flags")
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set(CMAKE_ASM_FLAGS "-march=rv32imc -x assembler-with-cpp"
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CACHE STRING "Assembler Base Flags")
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set(CMAKE_EXE_LINKER_FLAGS "-march=rv32imc --specs=nano.specs --specs=nosys.specs"
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CACHE STRING "Linker Base Flags")
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@ -25,11 +25,6 @@
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.. tool-esp32s2ulp-elf-notes
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---
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.. tool-riscv-none-embed-gcc-notes
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---
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.. tool-openocd-esp32-notes
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@ -11,11 +11,11 @@ The ULP-RISC-V coprocessor is a variant of the ULP, present in ESP32-S2. Similar
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Installing the ULP-RISC-V Toolchain
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-----------------------------------
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The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using the `riscv-embedded toolchain`_.
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The ULP-RISC-V coprocessor code is written in C (assembly is also possible) and compiled using RISC-V toolchain based on GCC.
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If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then you need to perform an extra step to get the ULP-RISC-V toolchain installed, execute the command below inside the IDF folder::
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If you have already set up ESP-IDF with CMake build system according to the :doc:`Getting Started Guide <../../get-started/index>`, then the toolchain should already be installed.
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$ idf_tools.py install riscv-none-embed-gcc
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.. note: In earlier versions of ESP-IDF, RISC-V toolchain had a different prefix: `riscv-none-embed-gcc`.
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Compiling the ULP-RISC-V Code
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@ -56,7 +56,7 @@ To compile the ULP-RISC-V code as part of the component, the following steps mus
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5. **Dump the contents of the ELF file into a binary** (``ulp_app_name.bin``) which can then be embedded into the application.
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6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv-none-embed-nm``.
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6. **Generate a list of global symbols** (``ulp_app_name.sym``) in the ELF file using ``riscv32-esp-elf-nm``.
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7. **Create an LD export script and header file** (``ulp_app_name.ld`` and ``ulp_app_name.h``) containing the symbols from ``ulp_app_name.sym``. This is done using the ``esp32ulp_mapgen.py`` utility.
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@ -147,5 +147,3 @@ The program runs until the field ``RTC_CNTL_COCPU_DONE`` in register ``RTC_CNTL_
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To disable the timer (effectively preventing the ULP program from running again), please clear the ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` bit in the ``RTC_CNTL_STATE0_REG`` register. This can be done both from the ULP code and from the main program.
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.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/
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@ -27,11 +27,6 @@
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.. tool-esp32s2ulp-elf-notes
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---
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.. tool-riscv-none-embed-gcc-notes
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---
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.. tool-openocd-esp32-notes
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@ -11,12 +11,11 @@ ULP-RISC-V 协处理器是 ULP 的一种变体,用于 ESP32-S2。与 ULP 类
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安装 ULP-RISC-V 工具链
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-----------------------------------
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ULP-RISC-V 协处理器代码以 C 语言编写(也可能是汇编语言),使用 `riscv-embedded toolchain`_ 进行编译。
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ULP-RISC-V 协处理器代码以 C 语言编写(也可能是汇编语言),使用基于GCC的 RISC-V 工具链进行编译。
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如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统,还需要在 IDF 文件夹中执行以下指令,安装 ULP-RISC-V 工具链::
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$ idf_tools.py install riscv-none-embed-gcc
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如果你已依照 :doc:`快速入门指南 <../../get-started/index>` 中的介绍安装好了 ESP-IDF 及其 CMake 构建系统,那么 ULP-RISC-V 工具链已经被默认安装到了你的开发环境中。
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.. note: 在早期版本的ESP-IDF中,RISC-V工具链具有不同的名称:`riscv-none-embed-gcc`。
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编译 ULP-RISC-V 代码
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-----------------------------
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@ -25,7 +24,7 @@ $ idf_tools.py install riscv-none-embed-gcc
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1. ULP-RISC-V 代码以 C 语言或汇编语言编写(必须使用 `.S` 扩展名),必须放在组件目录中一个独立的目录中,例如 `ulp/`。
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.. 注意:当注册组件时(通过 ``idf_component_register``),该目录不应被添加至 ``SRC_DIRS`` 参数,因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件,请见以下步骤。
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.. note: 当注册组件时(通过 ``idf_component_register``),该目录不应被添加至 ``SRC_DIRS`` 参数,因为目前 ULP-FSM 需要进行此步骤。如何正确添加 ULP 源文件,请见以下步骤。
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2. 注册后从组件 CMakeLists.txt 中调用 ``ulp_embed_binary`` 示例如下::
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@ -147,5 +146,3 @@ ULP-RISC-V 协处理器由定时器启动,调用 :cpp:func:`ulp_riscv_run` 即
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如需禁用定时器(有效防止 ULP 程序再次运行),请清除 ``RTC_CNTL_STATE0_REG`` 寄存器中的 ``RTC_CNTL_ULP_CP_SLP_TIMER_EN`` 位,此项操作可在 ULP 代码或主程序中进行。
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.. _riscv-embedded toolchain: https://xpack.github.io/riscv-none-embed-gcc/
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@ -115,9 +115,6 @@ build_ssc_esp32s2:
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TEST_TYPE: "unit_test"
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PYTHON_VER: 3
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script:
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# RISC-V toolchain is optional but ULP may need it, so install:
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- $IDF_PATH/tools/idf_tools.py install riscv-none-embed-gcc
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- . $IDF_PATH/export.sh
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- ${IDF_PATH}/tools/ci/find_apps_build_apps.sh
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- cd $CI_PROJECT_DIR/tools/unit-test-app
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- python tools/UnitTestParser.py ${BUILD_PATH}
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@ -155,9 +152,6 @@ build_esp_idf_tests_cmake_esp32s3:
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BUILD_PATH: ${CI_PROJECT_DIR}/build_${TEST_PREFIX}
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PYTHON_VER: 3
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script:
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# RISC-V toolchain is optional but ULP may need it, so install:
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- $IDF_PATH/tools/idf_tools.py install riscv-none-embed-gcc
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- . $IDF_PATH/export.sh
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# it's not possible to build 100% out-of-tree and have the "artifacts"
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# mechanism work, but this is the next best thing
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- ${IDF_PATH}/tools/ci/find_apps_build_apps.sh
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@ -51,7 +51,7 @@
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"win64": {
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"sha256": "58419852fefb7111fdec056ac2fd7c4bd09c1f4c17610a761a97b788413527cf",
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"size": 106855139,
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"url": "https://github.com/espressif/crosstool-NG/releases/download/esp-2020r3/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-win64.zip"
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"url": "https://dl.espressif.com/dl/xtensa-esp32-elf-gcc8_4_0-esp-2020r3-win64.zip"
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}
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}
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]
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@ -169,58 +169,56 @@
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]
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},
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{
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"description": "Toolchain for RISC-V",
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"description": "Toolchain for 32-bit RISC-V based on GCC",
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"export_paths": [
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[
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"xPacks",
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"riscv-none-embed-gcc",
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"8.2.0-3.1",
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"riscv32-esp-elf",
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"bin"
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]
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],
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"export_vars": {},
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"info_url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack",
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"install": "on_request",
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"license": "MIT",
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"name": "riscv-none-embed-gcc",
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"info_url": "https://github.com/espressif/crosstool-NG",
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"install": "always",
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"license": "GPL-3.0-with-GCC-exception",
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"name": "riscv32-esp-elf",
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"version_cmd": [
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"riscv-none-embed-gcc",
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"riscv32-esp-elf-gcc",
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"--version"
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],
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"version_regex": "(riscv-none-embed-gcc) \\(xPack GNU RISC-V Embedded GCC, 64-bit\\) (8.2.0)",
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"version_regex": "\\(crosstool-NG\\s+(?:crosstool-ng-)?([0-9a-zA-Z\\.\\-_]+)\\)\\s*([0-9\\.]+)",
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"version_regex_replace": "\\1-\\2",
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"versions": [
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{
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"linux-amd64": {
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"sha256": "3d40fab50ebad8424ff85748f25d2eaee50f86a5d5222abd7a45a2e490f1e4f5",
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"size": 216042047,
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"url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-linux-x64.tgz"
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"sha256": "425454c5c4e2cde5dd2dd3a1d398befc70addf71547840fb6d0ec4b307b08894",
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"size": 152042971,
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"url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-amd64.tar.gz"
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},
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"linux-i686": {
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"sha256": "2e856ee33ef544a2405183366cdf299da2cca697e8cc57627dfaad8ab4460a99",
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"size": 219854326,
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"url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-linux-x32.tgz"
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"linux-armel": {
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"sha256": "8ae098751b5196ca8a80d832cc9930bc4d639762a6cb22be3cfe0a8d71b2f230",
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"size": 150801079,
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"url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-linux-armel.tar.gz"
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},
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"macos": {
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"sha256": "48ece50b7272a8e49e56e37f54f9962f93dce4ca44f1bb4c8113fab0230fbdf1",
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"size": 214715632,
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"url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-darwin-x64.tgz"
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"sha256": "35b1aef85b7e6b4268774f627e8e835d087bcf8b9972cfb6436614aa2e40d4a9",
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"size": 158594401,
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"url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-macos.tar.gz"
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},
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"name": "riscv-none-embed-gcc-8.2.0",
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"name": "1.24.0.123_64eb9ff-8.4.0",
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"status": "recommended",
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"win32": {
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"sha256": "78bcd52f7b404133de3b2f9568e7101c1de747f98db3a7b0d6251b75a1754867",
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"size": 232387519,
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"url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x32.zip"
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"sha256": "4f576b08620f57c270ac677cc94dce2767fff72d27a539e348d448f63b480d1f",
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"size": 190014086,
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"url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win32.zip"
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},
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"win64": {
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"sha256": "98b60720607f1400081806d60d70796b30399f8b426e2c790a4abb0bffb9e5ec",
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"size": 241927614,
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"url": "https://github.com/xpack-dev-tools/riscv-none-embed-gcc-xpack/releases/download/v8.2.0-3.1/xpack-riscv-none-embed-gcc-8.2.0-3.1-win32-x64.zip"
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"sha256": "51e392ed88498f3fc4ad07e9ff4b5225f6533b1c363ecd7dd67c10d8d31b6b23",
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"size": 191565525,
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"url": "https://dl.espressif.com/dl/toolchains/preview/riscv32-esp-elf-gcc8_4_0-crosstool-ng-1.24.0-123-g64eb9ff-win64.zip"
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}
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}
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]
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},
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}
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{
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"description": "Toolchain for ESP32 ULP coprocessor",
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"export_paths": [
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