kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'bugfix/restore_rtc_wdt_driver' into 'master'
Restore rtc_wdt driver Closes IDF-1514 See merge request espressif/esp-idf!8148pull/4823/head^2
Angus Gratton
commit
dcaa9e385a
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@ -0,0 +1,198 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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/* Recommendation of using API RTC_WDT.
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1) Setting and enabling rtc_wdt:
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@code
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rtc_wdt_protect_off();
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rtc_wdt_disable();
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rtc_wdt_set_length_of_reset_signal(RTC_WDT_SYS_RESET_SIG, RTC_WDT_LENGTH_3_2us);
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rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_RESET_SYSTEM); //RTC_WDT_STAGE_ACTION_RESET_SYSTEM or RTC_WDT_STAGE_ACTION_RESET_RTC
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rtc_wdt_set_time(RTC_WDT_STAGE0, 7000); // timeout rtd_wdt 7000ms.
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rtc_wdt_enable();
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rtc_wdt_protect_on();
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@endcode
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* If you use this option RTC_WDT_STAGE_ACTION_RESET_SYSTEM then after reset you can see these messages.
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They can help to understand where the CPUs were when the WDT was triggered.
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W (30) boot: PRO CPU has been reset by WDT.
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W (30) boot: WDT reset info: PRO CPU PC=0x400xxxxx
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... function where it happened
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W (31) boot: WDT reset info: APP CPU PC=0x400xxxxx
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... function where it happened
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* If you use this option RTC_WDT_STAGE_ACTION_RESET_RTC then you will see message (rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT))
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without description where were CPUs when it happened.
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2) Reset counter of rtc_wdt:
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@code
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rtc_wdt_feed();
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@endcode
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3) Disable rtc_wdt:
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@code
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rtc_wdt_disable();
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@endcode
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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#include "soc/rtc_periph.h"
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#include "esp_err.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/// List of stage of rtc watchdog. WDT has 4 stage.
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typedef enum {
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RTC_WDT_STAGE0 = 0, /*!< Stage 0 */
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RTC_WDT_STAGE1 = 1, /*!< Stage 1 */
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RTC_WDT_STAGE2 = 2, /*!< Stage 2 */
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RTC_WDT_STAGE3 = 3 /*!< Stage 3 */
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} rtc_wdt_stage_t;
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/// List of action. When the time of stage expires this action will be triggered.
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typedef enum {
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RTC_WDT_STAGE_ACTION_OFF = RTC_WDT_STG_SEL_OFF, /*!< Disabled. This stage will have no effects on the system. */
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RTC_WDT_STAGE_ACTION_INTERRUPT = RTC_WDT_STG_SEL_INT, /*!< Trigger an interrupt. When the stage expires an interrupt is triggered. */
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RTC_WDT_STAGE_ACTION_RESET_CPU = RTC_WDT_STG_SEL_RESET_CPU, /*!< Reset a CPU core. */
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RTC_WDT_STAGE_ACTION_RESET_SYSTEM = RTC_WDT_STG_SEL_RESET_SYSTEM, /*!< Reset the main system includes the CPU and all peripherals. The RTC is an exception to this, and it will not be reset. */
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RTC_WDT_STAGE_ACTION_RESET_RTC = RTC_WDT_STG_SEL_RESET_RTC /*!< Reset the main system and the RTC. */
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} rtc_wdt_stage_action_t;
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/// Type of reset signal
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typedef enum {
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RTC_WDT_SYS_RESET_SIG = 0, /*!< System reset signal length selection */
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RTC_WDT_CPU_RESET_SIG = 1 /*!< CPU reset signal length selection */
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} rtc_wdt_reset_sig_t;
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/// Length of reset signal
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typedef enum {
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RTC_WDT_LENGTH_100ns = 0, /*!< 100 ns */
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RTC_WDT_LENGTH_200ns = 1, /*!< 200 ns */
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RTC_WDT_LENGTH_300ns = 2, /*!< 300 ns */
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RTC_WDT_LENGTH_400ns = 3, /*!< 400 ns */
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RTC_WDT_LENGTH_500ns = 4, /*!< 500 ns */
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RTC_WDT_LENGTH_800ns = 5, /*!< 800 ns */
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RTC_WDT_LENGTH_1_6us = 6, /*!< 1.6 us */
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RTC_WDT_LENGTH_3_2us = 7 /*!< 3.2 us */
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} rtc_wdt_length_sig_t;
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/**
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* @brief Get status of protect of rtc_wdt.
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*
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* @return
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* - True if the protect of RTC_WDT is set
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*/
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bool rtc_wdt_get_protect_status(void);
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/**
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* @brief Set protect of rtc_wdt.
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*/
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void rtc_wdt_protect_on(void);
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/**
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* @brief Reset protect of rtc_wdt.
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*/
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void rtc_wdt_protect_off(void);
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/**
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* @brief Enable rtc_wdt.
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*/
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void rtc_wdt_enable(void);
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/**
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* @brief Enable the flash boot protection procedure for WDT.
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*
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* Do not recommend to use it in the app.
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* This function was added to be compatibility with the old bootloaders.
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* This mode is disabled in bootloader or using rtc_wdt_disable() function.
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*/
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void rtc_wdt_flashboot_mode_enable(void);
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/**
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* @brief Disable rtc_wdt.
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*/
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void rtc_wdt_disable(void);
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/**
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* @brief Reset counter rtc_wdt.
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*
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* It returns to stage 0 and its expiry counter restarts from 0.
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*/
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void rtc_wdt_feed(void);
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/**
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* @brief Set time for required stage.
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*
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* @param[in] stage Stage of rtc_wdt.
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* @param[in] timeout_ms Timeout for this stage.
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*
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* @return
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* - ESP_OK In case of success
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* - ESP_ERR_INVALID_ARG If stage has invalid value
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*/
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esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms);
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/**
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* @brief Get the timeout set for the required stage.
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*
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* @param[in] stage Stage of rtc_wdt.
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* @param[out] timeout_ms Timeout set for this stage. (not elapsed time).
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*
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* @return
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* - ESP_OK In case of success
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* - ESP_ERR_INVALID_ARG If stage has invalid value
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*/
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esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms);
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/**
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* @brief Set an action for required stage.
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*
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* @param[in] stage Stage of rtc_wdt.
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* @param[in] stage_sel Action for this stage. When the time of stage expires this action will be triggered.
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*
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* @return
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* - ESP_OK In case of success
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* - ESP_ERR_INVALID_ARG If stage or stage_sel have invalid value
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*/
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esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel);
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/**
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* @brief Set a length of reset signal.
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*
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* @param[in] reset_src Type of reset signal.
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* @param[in] reset_signal_length A length of reset signal.
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*
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* @return
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* - ESP_OK In case of success
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* - ESP_ERR_INVALID_ARG If reset_src or reset_signal_length have invalid value
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*/
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esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length);
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/**
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* @brief Return true if rtc_wdt is enabled.
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*
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* @return
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* - True rtc_wdt is enabled
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*/
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bool rtc_wdt_is_on(void);
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#ifdef __cplusplus
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}
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#endif
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@ -6,6 +6,7 @@ set(srcs "adc_hal.c"
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"rtc_pm.c"
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"rtc_sleep.c"
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"rtc_time.c"
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"rtc_wdt.c"
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"soc_memory_layout.c"
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"touch_sensor_hal.c")
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@ -0,0 +1,151 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "soc/rtc_wdt.h"
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#include "soc/rtc.h"
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bool rtc_wdt_get_protect_status(void)
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{
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return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE;
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}
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void rtc_wdt_protect_off(void)
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{
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
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}
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void rtc_wdt_protect_on(void)
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{
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, 0);
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}
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void rtc_wdt_enable(void)
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{
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REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
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SET_PERI_REG_MASK(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN | RTC_CNTL_WDT_PAUSE_IN_SLP);
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}
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void rtc_wdt_flashboot_mode_enable(void)
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{
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REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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}
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void rtc_wdt_disable(void)
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{
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bool protect = rtc_wdt_get_protect_status();
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if (protect) {
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rtc_wdt_protect_off();
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}
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REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
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rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_OFF);
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rtc_wdt_set_stage(RTC_WDT_STAGE1, RTC_WDT_STAGE_ACTION_OFF);
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rtc_wdt_set_stage(RTC_WDT_STAGE2, RTC_WDT_STAGE_ACTION_OFF);
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rtc_wdt_set_stage(RTC_WDT_STAGE3, RTC_WDT_STAGE_ACTION_OFF);
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REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN);
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if (protect) {
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rtc_wdt_protect_on();
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}
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}
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void rtc_wdt_feed(void)
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{
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bool protect = rtc_wdt_get_protect_status();
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if (protect) {
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rtc_wdt_protect_off();
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}
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REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
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if (protect) {
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rtc_wdt_protect_on();
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}
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}
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esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
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{
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if (stage > 3) {
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return ESP_ERR_INVALID_ARG;
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}
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uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000);
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if (stage == RTC_WDT_STAGE0) {
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG1_REG, timeout);
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} else if (stage == RTC_WDT_STAGE1) {
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG2_REG, timeout);
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} else if (stage == RTC_WDT_STAGE2) {
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG3_REG, timeout);
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} else {
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WRITE_PERI_REG(RTC_CNTL_WDTCONFIG4_REG, timeout);
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}
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return ESP_OK;
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}
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esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms)
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{
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if (stage > 3) {
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return ESP_ERR_INVALID_ARG;
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}
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uint32_t time_tick;
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if (stage == RTC_WDT_STAGE0) {
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time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG1_REG);
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} else if (stage == RTC_WDT_STAGE1) {
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time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG2_REG);
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} else if (stage == RTC_WDT_STAGE2) {
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time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG3_REG);
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} else {
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time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG4_REG);
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}
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*timeout_ms = time_tick * 1000 / rtc_clk_slow_freq_get_hz();
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return ESP_OK;
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}
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esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel)
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{
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if (stage > 3 || stage_sel > 4) {
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return ESP_ERR_INVALID_ARG;
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}
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if (stage == RTC_WDT_STAGE0) {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, stage_sel);
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} else if (stage == RTC_WDT_STAGE1) {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG1, stage_sel);
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} else if (stage == RTC_WDT_STAGE2) {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG2, stage_sel);
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} else {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG3, stage_sel);
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}
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return ESP_OK;
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}
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esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length)
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{
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if (reset_src > 1 || reset_signal_length > 7) {
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return ESP_ERR_INVALID_ARG;
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}
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if (reset_src == 0) {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, reset_signal_length);
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} else {
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REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_CPU_RESET_LENGTH, reset_signal_length);
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}
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return ESP_OK;
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}
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bool rtc_wdt_is_on(void)
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{
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return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
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}
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@ -6,6 +6,7 @@ set(srcs "adc_hal.c"
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"rtc_pm.c"
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"rtc_sleep.c"
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"rtc_time.c"
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"rtc_wdt.c"
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"soc_memory_layout.c"
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"touch_sensor_hal.c"
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"usb_hal.c")
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|
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@ -0,0 +1,152 @@
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// Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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//
|
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// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#include "soc/rtc_wdt.h"
|
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#include "soc/rtc.h"
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#include "soc/efuse_periph.h"
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|
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bool rtc_wdt_get_protect_status(void)
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{
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return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE;
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}
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void rtc_wdt_protect_off(void)
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{
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE);
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}
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void rtc_wdt_protect_on(void)
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{
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WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, 0);
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}
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void rtc_wdt_enable(void)
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{
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REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
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SET_PERI_REG_MASK(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN | RTC_CNTL_WDT_PAUSE_IN_SLP);
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}
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void rtc_wdt_flashboot_mode_enable(void)
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{
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REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
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}
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void rtc_wdt_disable(void)
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{
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bool protect = rtc_wdt_get_protect_status();
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if (protect) {
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rtc_wdt_protect_off();
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}
|
||||
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
|
||||
rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_OFF);
|
||||
rtc_wdt_set_stage(RTC_WDT_STAGE1, RTC_WDT_STAGE_ACTION_OFF);
|
||||
rtc_wdt_set_stage(RTC_WDT_STAGE2, RTC_WDT_STAGE_ACTION_OFF);
|
||||
rtc_wdt_set_stage(RTC_WDT_STAGE3, RTC_WDT_STAGE_ACTION_OFF);
|
||||
REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
|
||||
REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN);
|
||||
if (protect) {
|
||||
rtc_wdt_protect_on();
|
||||
}
|
||||
}
|
||||
|
||||
void rtc_wdt_feed(void)
|
||||
{
|
||||
bool protect = rtc_wdt_get_protect_status();
|
||||
if (protect) {
|
||||
rtc_wdt_protect_off();
|
||||
}
|
||||
REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED);
|
||||
if (protect) {
|
||||
rtc_wdt_protect_on();
|
||||
}
|
||||
}
|
||||
|
||||
static uint32_t get_addr_reg(rtc_wdt_stage_t stage)
|
||||
{
|
||||
uint32_t reg;
|
||||
if (stage == RTC_WDT_STAGE0) {
|
||||
reg = RTC_CNTL_WDTCONFIG1_REG;
|
||||
} else if (stage == RTC_WDT_STAGE1) {
|
||||
reg = RTC_CNTL_WDTCONFIG2_REG;
|
||||
} else if (stage == RTC_WDT_STAGE2) {
|
||||
reg = RTC_CNTL_WDTCONFIG3_REG;
|
||||
} else {
|
||||
reg = RTC_CNTL_WDTCONFIG4_REG;
|
||||
}
|
||||
return reg;
|
||||
}
|
||||
|
||||
esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms)
|
||||
{
|
||||
if (stage > 3) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000);
|
||||
if (stage == RTC_WDT_STAGE0) {
|
||||
timeout = timeout >> (1 + REG_GET_FIELD(EFUSE_RD_REPEAT_DATA1_REG, EFUSE_WDT_DELAY_SEL));
|
||||
}
|
||||
WRITE_PERI_REG(get_addr_reg(stage), timeout);
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms)
|
||||
{
|
||||
if (stage > 3) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
uint32_t time_tick;
|
||||
time_tick = READ_PERI_REG(get_addr_reg(stage));
|
||||
*timeout_ms = time_tick * 1000 / rtc_clk_slow_freq_get_hz();
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel)
|
||||
{
|
||||
if (stage > 3 || stage_sel > 4) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
if (stage == RTC_WDT_STAGE0) {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, stage_sel);
|
||||
} else if (stage == RTC_WDT_STAGE1) {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG1, stage_sel);
|
||||
} else if (stage == RTC_WDT_STAGE2) {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG2, stage_sel);
|
||||
} else {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG3, stage_sel);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length)
|
||||
{
|
||||
if (reset_src > 1 || reset_signal_length > 7) {
|
||||
return ESP_ERR_INVALID_ARG;
|
||||
}
|
||||
if (reset_src == 0) {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, reset_signal_length);
|
||||
} else {
|
||||
REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_CPU_RESET_LENGTH, reset_signal_length);
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
bool rtc_wdt_is_on(void)
|
||||
{
|
||||
return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0);
|
||||
}
|
||||
Ładowanie…
Reference in New Issue