From dbba26643fcda55c7ba1169b7362a79546f2ad64 Mon Sep 17 00:00:00 2001 From: Omar Chebib Date: Tue, 18 Jan 2022 17:34:15 +0800 Subject: [PATCH 1/2] RTC WDT: refactor code to remove duplicated code --- components/esp_hw_support/CMakeLists.txt | 4 + .../esp_hw_support/include/soc/rtc_wdt.h | 6 +- components/esp_hw_support/linker.lf | 2 +- .../esp_hw_support/port/esp32/CMakeLists.txt | 1 - .../esp_hw_support/port/esp32/rtc_wdt.c | 143 ------------------ .../port/esp32s2/CMakeLists.txt | 1 - .../port/esp32s3/CMakeLists.txt | 1 - .../esp_hw_support/port/esp32s3/rtc_wdt.c | 5 - .../{port/esp32s2 => }/rtc_wdt.c | 6 + .../soc/esp32/include/soc/Kconfig.soc_caps.in | 4 + components/soc/esp32/include/soc/soc_caps.h | 1 + .../esp32s2/include/soc/Kconfig.soc_caps.in | 4 + components/soc/esp32s2/include/soc/soc_caps.h | 1 + 13 files changed, 26 insertions(+), 153 deletions(-) delete mode 100644 components/esp_hw_support/port/esp32/rtc_wdt.c delete mode 100644 components/esp_hw_support/port/esp32s3/rtc_wdt.c rename components/esp_hw_support/{port/esp32s2 => }/rtc_wdt.c (97%) diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 2bdc6525dc..7bc03a57f5 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -22,6 +22,10 @@ if(NOT BOOTLOADER_BUILD) # [refactor-todo]: requires "driver" for GPIO and RTC (by sleep_gpio and sleep_modes) list(APPEND priv_requires driver) + if(CONFIG_SOC_RTC_WDT_SUPPORTED) + list(APPEND srcs "rtc_wdt.c") + endif() + else() # Requires "_esp_error_check_failed()" function list(APPEND priv_requires "esp_system") diff --git a/components/esp_hw_support/include/soc/rtc_wdt.h b/components/esp_hw_support/include/soc/rtc_wdt.h index 97d1d8425b..efbfe32a84 100644 --- a/components/esp_hw_support/include/soc/rtc_wdt.h +++ b/components/esp_hw_support/include/soc/rtc_wdt.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2018-2022 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -45,6 +45,8 @@ without description where were CPUs when it happened. #include "soc/rtc_periph.h" #include "esp_err.h" +#if SOC_RTC_WDT_SUPPORTED + #ifdef __cplusplus extern "C" { @@ -188,3 +190,5 @@ bool rtc_wdt_is_on(void); #ifdef __cplusplus } #endif + +#endif // SOC_CAPS_RTC_WDT diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf index 11e5966c0f..21c4cbb023 100644 --- a/components/esp_hw_support/linker.lf +++ b/components/esp_hw_support/linker.lf @@ -9,7 +9,7 @@ entries: rtc_pm (noflash_text) rtc_sleep (noflash_text) rtc_time (noflash_text) - if IDF_TARGET_ESP32C3 = n && IDF_TARGET_ESP32H2 = n && IDF_TARGET_ESP32C2 = n: + if SOC_RTC_WDT_SUPPORTED = y: rtc_wdt (noflash_text) if IDF_TARGET_ESP32S3 = y: if SPIRAM_MODE_QUAD = y: diff --git a/components/esp_hw_support/port/esp32/CMakeLists.txt b/components/esp_hw_support/port/esp32/CMakeLists.txt index fe3ffda477..6c1db686e2 100644 --- a/components/esp_hw_support/port/esp32/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32/CMakeLists.txt @@ -8,7 +8,6 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "rtc_wdt.c" "chip_info.c") if(NOT BOOTLOADER_BUILD) diff --git a/components/esp_hw_support/port/esp32/rtc_wdt.c b/components/esp_hw_support/port/esp32/rtc_wdt.c deleted file mode 100644 index 42ab860e69..0000000000 --- a/components/esp_hw_support/port/esp32/rtc_wdt.c +++ /dev/null @@ -1,143 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#include "soc/rtc_wdt.h" -#include "soc/rtc.h" - - -bool rtc_wdt_get_protect_status(void) -{ - return READ_PERI_REG(RTC_CNTL_WDTWPROTECT_REG) != RTC_CNTL_WDT_WKEY_VALUE; -} - -void rtc_wdt_protect_off(void) -{ - WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, RTC_CNTL_WDT_WKEY_VALUE); -} - -void rtc_wdt_protect_on(void) -{ - WRITE_PERI_REG(RTC_CNTL_WDTWPROTECT_REG, 0); -} - - -void rtc_wdt_enable(void) -{ - REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED); - SET_PERI_REG_MASK(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN | RTC_CNTL_WDT_PAUSE_IN_SLP); -} - -void rtc_wdt_flashboot_mode_enable(void) -{ - REG_SET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN); -} - -void rtc_wdt_disable(void) -{ - bool protect = rtc_wdt_get_protect_status(); - if (protect) { - rtc_wdt_protect_off(); - } - REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED); - rtc_wdt_set_stage(RTC_WDT_STAGE0, RTC_WDT_STAGE_ACTION_OFF); - rtc_wdt_set_stage(RTC_WDT_STAGE1, RTC_WDT_STAGE_ACTION_OFF); - rtc_wdt_set_stage(RTC_WDT_STAGE2, RTC_WDT_STAGE_ACTION_OFF); - rtc_wdt_set_stage(RTC_WDT_STAGE3, RTC_WDT_STAGE_ACTION_OFF); - REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN); - REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN); - if (protect) { - rtc_wdt_protect_on(); - } -} - -void rtc_wdt_feed(void) -{ - bool protect = rtc_wdt_get_protect_status(); - if (protect) { - rtc_wdt_protect_off(); - } - REG_SET_BIT(RTC_CNTL_WDTFEED_REG, RTC_CNTL_WDT_FEED); - if (protect) { - rtc_wdt_protect_on(); - } -} - -esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms) -{ - if (stage > 3) { - return ESP_ERR_INVALID_ARG; - } - uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000); - if (stage == RTC_WDT_STAGE0) { - WRITE_PERI_REG(RTC_CNTL_WDTCONFIG1_REG, timeout); - } else if (stage == RTC_WDT_STAGE1) { - WRITE_PERI_REG(RTC_CNTL_WDTCONFIG2_REG, timeout); - } else if (stage == RTC_WDT_STAGE2) { - WRITE_PERI_REG(RTC_CNTL_WDTCONFIG3_REG, timeout); - } else { - WRITE_PERI_REG(RTC_CNTL_WDTCONFIG4_REG, timeout); - } - - return ESP_OK; -} - -esp_err_t rtc_wdt_get_timeout(rtc_wdt_stage_t stage, unsigned int* timeout_ms) -{ - if (stage > 3) { - return ESP_ERR_INVALID_ARG; - } - uint32_t time_tick; - if (stage == RTC_WDT_STAGE0) { - time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG1_REG); - } else if (stage == RTC_WDT_STAGE1) { - time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG2_REG); - } else if (stage == RTC_WDT_STAGE2) { - time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG3_REG); - } else { - time_tick = READ_PERI_REG(RTC_CNTL_WDTCONFIG4_REG); - } - - *timeout_ms = time_tick * 1000 / rtc_clk_slow_freq_get_hz(); - - return ESP_OK; -} - -esp_err_t rtc_wdt_set_stage(rtc_wdt_stage_t stage, rtc_wdt_stage_action_t stage_sel) -{ - if (stage > 3 || stage_sel > 4) { - return ESP_ERR_INVALID_ARG; - } - if (stage == RTC_WDT_STAGE0) { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG0, stage_sel); - } else if (stage == RTC_WDT_STAGE1) { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG1, stage_sel); - } else if (stage == RTC_WDT_STAGE2) { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG2, stage_sel); - } else { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_STG3, stage_sel); - } - - return ESP_OK; -} - -esp_err_t rtc_wdt_set_length_of_reset_signal(rtc_wdt_reset_sig_t reset_src, rtc_wdt_length_sig_t reset_signal_length) -{ - if (reset_src > 1 || reset_signal_length > 7) { - return ESP_ERR_INVALID_ARG; - } - if (reset_src == 0) { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_SYS_RESET_LENGTH, reset_signal_length); - } else { - REG_SET_FIELD(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_CPU_RESET_LENGTH, reset_signal_length); - } - - return ESP_OK; -} - -bool rtc_wdt_is_on(void) -{ - return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0); -} diff --git a/components/esp_hw_support/port/esp32s2/CMakeLists.txt b/components/esp_hw_support/port/esp32s2/CMakeLists.txt index 336bfd1b84..cd45501824 100644 --- a/components/esp_hw_support/port/esp32s2/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s2/CMakeLists.txt @@ -8,7 +8,6 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "rtc_wdt.c" "regi2c_ctrl.c" "chip_info.c" ) diff --git a/components/esp_hw_support/port/esp32s3/CMakeLists.txt b/components/esp_hw_support/port/esp32s3/CMakeLists.txt index 8b7664dd6a..c6d09bf069 100644 --- a/components/esp_hw_support/port/esp32s3/CMakeLists.txt +++ b/components/esp_hw_support/port/esp32s3/CMakeLists.txt @@ -8,7 +8,6 @@ set(srcs "rtc_pm.c" "rtc_sleep.c" "rtc_time.c" - "rtc_wdt.c" "chip_info.c" ) diff --git a/components/esp_hw_support/port/esp32s3/rtc_wdt.c b/components/esp_hw_support/port/esp32s3/rtc_wdt.c deleted file mode 100644 index b2251506a4..0000000000 --- a/components/esp_hw_support/port/esp32s3/rtc_wdt.c +++ /dev/null @@ -1,5 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2018-2021 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ diff --git a/components/esp_hw_support/port/esp32s2/rtc_wdt.c b/components/esp_hw_support/rtc_wdt.c similarity index 97% rename from components/esp_hw_support/port/esp32s2/rtc_wdt.c rename to components/esp_hw_support/rtc_wdt.c index 5ef9ad6ddd..9296770105 100644 --- a/components/esp_hw_support/port/esp32s2/rtc_wdt.c +++ b/components/esp_hw_support/rtc_wdt.c @@ -4,10 +4,12 @@ * SPDX-License-Identifier: Apache-2.0 */ +#include "soc/efuse_periph.h" #include "soc/rtc_wdt.h" #include "soc/rtc.h" #include "hal/efuse_ll.h" +#if SOC_RTC_WDT_SUPPORTED bool rtc_wdt_get_protect_status(void) { @@ -87,9 +89,11 @@ esp_err_t rtc_wdt_set_time(rtc_wdt_stage_t stage, unsigned int timeout_ms) return ESP_ERR_INVALID_ARG; } uint32_t timeout = (uint32_t) ((uint64_t) rtc_clk_slow_freq_get_hz() * timeout_ms / 1000); +#if !CONFIG_IDF_TARGET_ESP32 if (stage == RTC_WDT_STAGE0) { timeout = timeout >> (1 + efuse_ll_get_wdt_delay_sel()); } +#endif WRITE_PERI_REG(get_addr_reg(stage), timeout); return ESP_OK; } @@ -142,3 +146,5 @@ bool rtc_wdt_is_on(void) { return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0); } + +#endif // SOC_RTC_WDT_SUPPORTED diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index a2e570fb96..5f068bb4dd 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -83,6 +83,10 @@ config SOC_RTC_SLOW_MEM_SUPPORTED bool default y +config SOC_RTC_WDT_SUPPORTED + bool + default y + config SOC_I2S_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index fa58582e5e..d64071d4cd 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -80,6 +80,7 @@ #define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_SLOW_MEM_SUPPORTED 1 +#define SOC_RTC_WDT_SUPPORTED 1 #define SOC_I2S_SUPPORTED 1 #define SOC_RMT_SUPPORTED 1 #define SOC_SIGMADELTA_SUPPORTED 1 diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index 94c1929055..18fe16d86f 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -107,6 +107,10 @@ config SOC_RTC_SLOW_MEM_SUPPORTED bool default y +config SOC_RTC_WDT_SUPPORTED + bool + default y + config SOC_PSRAM_DMA_CAPABLE bool default y diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index 9411514d28..f82c7bc6d5 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -65,6 +65,7 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_SLOW_MEM_SUPPORTED 1 +#define SOC_RTC_WDT_SUPPORTED 1 #define SOC_PSRAM_DMA_CAPABLE 1 #define SOC_XT_WDT_SUPPORTED 1 #define SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY 1 From 96b362d1da04ab527109febb6a33c8622cc44e5f Mon Sep 17 00:00:00 2001 From: Omar Chebib Date: Mon, 28 Feb 2022 18:30:36 +0800 Subject: [PATCH 2/2] RTC WDT: Use target name instead of caps for rtc wdt --- components/esp_hw_support/CMakeLists.txt | 2 +- components/esp_hw_support/include/soc/rtc_wdt.h | 4 ++-- components/esp_hw_support/linker.lf | 2 +- components/esp_hw_support/rtc_wdt.c | 4 ++-- components/soc/esp32/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32/include/soc/soc_caps.h | 1 - components/soc/esp32s2/include/soc/Kconfig.soc_caps.in | 4 ---- components/soc/esp32s2/include/soc/soc_caps.h | 1 - 8 files changed, 6 insertions(+), 16 deletions(-) diff --git a/components/esp_hw_support/CMakeLists.txt b/components/esp_hw_support/CMakeLists.txt index 7bc03a57f5..44e1b2f57d 100644 --- a/components/esp_hw_support/CMakeLists.txt +++ b/components/esp_hw_support/CMakeLists.txt @@ -22,7 +22,7 @@ if(NOT BOOTLOADER_BUILD) # [refactor-todo]: requires "driver" for GPIO and RTC (by sleep_gpio and sleep_modes) list(APPEND priv_requires driver) - if(CONFIG_SOC_RTC_WDT_SUPPORTED) + if(CONFIG_IDF_TARGET_ESP32 OR CONFIG_IDF_TARGET_ESP32S2) list(APPEND srcs "rtc_wdt.c") endif() diff --git a/components/esp_hw_support/include/soc/rtc_wdt.h b/components/esp_hw_support/include/soc/rtc_wdt.h index efbfe32a84..29dd88520f 100644 --- a/components/esp_hw_support/include/soc/rtc_wdt.h +++ b/components/esp_hw_support/include/soc/rtc_wdt.h @@ -45,7 +45,7 @@ without description where were CPUs when it happened. #include "soc/rtc_periph.h" #include "esp_err.h" -#if SOC_RTC_WDT_SUPPORTED +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 #ifdef __cplusplus extern "C" @@ -191,4 +191,4 @@ bool rtc_wdt_is_on(void); } #endif -#endif // SOC_CAPS_RTC_WDT +#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 diff --git a/components/esp_hw_support/linker.lf b/components/esp_hw_support/linker.lf index 21c4cbb023..05c3fead8c 100644 --- a/components/esp_hw_support/linker.lf +++ b/components/esp_hw_support/linker.lf @@ -9,7 +9,7 @@ entries: rtc_pm (noflash_text) rtc_sleep (noflash_text) rtc_time (noflash_text) - if SOC_RTC_WDT_SUPPORTED = y: + if IDF_TARGET_ESP32 = y || IDF_TARGET_ESP32S2 = y: rtc_wdt (noflash_text) if IDF_TARGET_ESP32S3 = y: if SPIRAM_MODE_QUAD = y: diff --git a/components/esp_hw_support/rtc_wdt.c b/components/esp_hw_support/rtc_wdt.c index 9296770105..7ca9c5c358 100644 --- a/components/esp_hw_support/rtc_wdt.c +++ b/components/esp_hw_support/rtc_wdt.c @@ -9,7 +9,7 @@ #include "soc/rtc.h" #include "hal/efuse_ll.h" -#if SOC_RTC_WDT_SUPPORTED +#if CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 bool rtc_wdt_get_protect_status(void) { @@ -147,4 +147,4 @@ bool rtc_wdt_is_on(void) return (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_EN) != 0) || (REG_GET_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN) != 0); } -#endif // SOC_RTC_WDT_SUPPORTED +#endif // CONFIG_IDF_TARGET_ESP32 || CONFIG_IDF_TARGET_ESP32S2 diff --git a/components/soc/esp32/include/soc/Kconfig.soc_caps.in b/components/soc/esp32/include/soc/Kconfig.soc_caps.in index 5f068bb4dd..a2e570fb96 100644 --- a/components/soc/esp32/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32/include/soc/Kconfig.soc_caps.in @@ -83,10 +83,6 @@ config SOC_RTC_SLOW_MEM_SUPPORTED bool default y -config SOC_RTC_WDT_SUPPORTED - bool - default y - config SOC_I2S_SUPPORTED bool default y diff --git a/components/soc/esp32/include/soc/soc_caps.h b/components/soc/esp32/include/soc/soc_caps.h index d64071d4cd..fa58582e5e 100644 --- a/components/soc/esp32/include/soc/soc_caps.h +++ b/components/soc/esp32/include/soc/soc_caps.h @@ -80,7 +80,6 @@ #define SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_SLOW_MEM_SUPPORTED 1 -#define SOC_RTC_WDT_SUPPORTED 1 #define SOC_I2S_SUPPORTED 1 #define SOC_RMT_SUPPORTED 1 #define SOC_SIGMADELTA_SUPPORTED 1 diff --git a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in index 18fe16d86f..94c1929055 100644 --- a/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in +++ b/components/soc/esp32s2/include/soc/Kconfig.soc_caps.in @@ -107,10 +107,6 @@ config SOC_RTC_SLOW_MEM_SUPPORTED bool default y -config SOC_RTC_WDT_SUPPORTED - bool - default y - config SOC_PSRAM_DMA_CAPABLE bool default y diff --git a/components/soc/esp32s2/include/soc/soc_caps.h b/components/soc/esp32s2/include/soc/soc_caps.h index f82c7bc6d5..9411514d28 100644 --- a/components/soc/esp32s2/include/soc/soc_caps.h +++ b/components/soc/esp32s2/include/soc/soc_caps.h @@ -65,7 +65,6 @@ #define SOC_FLASH_ENCRYPTION_XTS_AES_256 1 #define SOC_RTC_FAST_MEM_SUPPORTED 1 #define SOC_RTC_SLOW_MEM_SUPPORTED 1 -#define SOC_RTC_WDT_SUPPORTED 1 #define SOC_PSRAM_DMA_CAPABLE 1 #define SOC_XT_WDT_SUPPORTED 1 #define SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY 1