Merge branch 'feature/spi_hal_move_out_iram_v5.1' into 'release/v5.1'

spi: change linker file to move spi hal out from iram (v5.1)

See merge request espressif/esp-idf!23448

components/driver/Kconfig

@@ -86,6 +86,7 @@ menu "Driver Configurations"
             bool "Place SPI master ISR function into IRAM"
             default y
             select PERIPH_CTRL_FUNC_IN_IRAM
+            select HAL_SPI_MASTER_FUNC_IN_IRAM
             help
                 Place the SPI master ISR in to IRAM to avoid possible cache miss.
 
@@ -109,6 +110,7 @@ menu "Driver Configurations"
             bool "Place SPI slave ISR function into IRAM"
             default y
             select PERIPH_CTRL_FUNC_IN_IRAM
+            select HAL_SPI_SLAVE_FUNC_IN_IRAM
             help
                 Place the SPI slave ISR in to IRAM to avoid possible cache miss.
 

components/driver/test_apps/spi/master/sdkconfig.defaults.esp32

@@ -1,8 +1,7 @@
 CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
 CONFIG_XTAL_FREQ_AUTO=y
-CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y
 CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
-
+CONFIG_SPI_FLASH_SHARE_SPI1_BUS=y
 CONFIG_PARTITION_TABLE_CUSTOM=y
 CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partition_table_esp32_flash.csv"
 CONFIG_PARTITION_TABLE_FILENAME="partition_table_esp32_flash.csv"

components/hal/Kconfig

@@ -90,4 +90,17 @@ menu "Hardware Abstraction Layer (HAL) and Low Level (LL)"
             but you will lose the possibility to debug this module, and some new
             features will be added and bugs will be fixed in the IDF source
             but cannot be synced to ROM.
+
+    config HAL_SPI_MASTER_FUNC_IN_IRAM
+        bool
+        depends on SPI_MASTER_ISR_IN_IRAM
+        help
+            Enable this option to place SPI master hal layer functions into IRAM.
+
+    config HAL_SPI_SLAVE_FUNC_IN_IRAM
+        bool
+        depends on SPI_SLAVE_ISR_IN_IRAM
+        help
+            Enable this option to place SPI slave hal layer functions into IRAM.
+
 endmenu

components/hal/linker.lf

@@ -8,8 +8,10 @@ entries:
     if IDF_TARGET_ESP32 = n && APP_BUILD_TYPE_PURE_RAM_APP = n:
         cache_hal (noflash)
     if SOC_GPSPI_SUPPORTED = y:
-        spi_hal_iram (noflash)
-        spi_slave_hal_iram (noflash)
+        if HAL_SPI_MASTER_FUNC_IN_IRAM = y:
+            spi_hal_iram (noflash)
+        if HAL_SPI_SLAVE_FUNC_IN_IRAM = y:
+            spi_slave_hal_iram (noflash)
     if UART_ISR_IN_IRAM = y || ESP_PANIC_HANDLER_IRAM = y:
         uart_hal_iram (noflash)
     else:

components/spi_flash/Kconfig

@@ -101,7 +101,8 @@ menu "SPI Flash driver"
     config SPI_FLASH_SHARE_SPI1_BUS
         bool  "Support other devices attached to SPI1 bus"
         default n
-        depends on !IDF_TARGET_ESP32S2
+        depends on IDF_TARGET_ESP32
+        select SPI_MASTER_ISR_IN_IRAM
         help
             Each SPI bus needs a lock for arbitration among devices. This allows multiple
             devices on a same bus, but may reduce the speed of esp_flash driver access to the

docs/en/api-guides/performance/ram-usage.rst

@@ -139,6 +139,7 @@ The following options will reduce IRAM usage of some ESP-IDF features:
     :esp32: - If the application uses PSRAM and is based on ESP32 rev. 3 (ECO3), setting :ref:`CONFIG_ESP32_REV_MIN` to ``3`` will disable PSRAM bug workarounds, saving ~10kB or more of IRAM.
     - Disabling :ref:`CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR` prevents posting ``esp_event`` events from :ref:`iram-safe-interrupt-handlers` but will save some IRAM.
     - Disabling :ref:`CONFIG_SPI_MASTER_ISR_IN_IRAM` prevents spi_master interrupts from being serviced while writing to flash, and may otherwise reduce spi_master performance, but will save some IRAM.
+    - Disabling :ref:`CONFIG_SPI_SLAVE_ISR_IN_IRAM` prevents spi_slave interrupts from being serviced while writing to flash, will save some IRAM.
     - Setting :ref:`CONFIG_HAL_DEFAULT_ASSERTION_LEVEL` to disable assertion for HAL component will save some IRAM especially for HAL code who calls `HAL_ASSERT` a lot and resides in IRAM.
     - Refer to sdkconfig menu ``Auto-detect flash chips`` and you can disable flash drivers which you don't need to save some IRAM.
 

docs/en/api-reference/peripherals/spi_master.rst

@@ -493,6 +493,8 @@ Typical transaction duration for one byte of data are given below.
 - Polling Transaction via DMA: {IDF_TARGET_TRANS_TIME_POLL_DMA} µs.
 - Polling Transaction via CPU: {IDF_TARGET_TRANS_TIME_POLL_CPU} µs.
 
+Note that these data are tested with :ref:`CONFIG_SPI_MASTER_ISR_IN_IRAM` enabled. SPI transaction related code are placed in the internal memory. If this option is turned off (for example, for internal memory optimization), the transaction duration may be affected.
+
 SPI Clock Frequency
 ^^^^^^^^^^^^^^^^^^^