From ce1ee3d8aebaca13f4db802001ecd89dd89140ab Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Wed, 10 Nov 2021 12:50:12 +0800 Subject: [PATCH] psram: add ESP32-D0WD-R2-V3 support --- .../esp_hw_support/include/esp_chip_info.h | 1 + .../esp_hw_support/port/esp32/chip_info.c | 3 +++ .../esp_hw_support/port/esp32/spiram_psram.c | 15 +++++++++++++++ components/soc/esp32/include/soc/efuse_reg.h | 19 ++++++------------- tools/ci/check_copyright_ignore.txt | 1 - 5 files changed, 25 insertions(+), 14 deletions(-) diff --git a/components/esp_hw_support/include/esp_chip_info.h b/components/esp_hw_support/include/esp_chip_info.h index 527e0a8cd0..c8dc8bbb8a 100644 --- a/components/esp_hw_support/include/esp_chip_info.h +++ b/components/esp_hw_support/include/esp_chip_info.h @@ -34,6 +34,7 @@ typedef enum { #define CHIP_FEATURE_BLE BIT(4) //!< Chip has Bluetooth LE #define CHIP_FEATURE_BT BIT(5) //!< Chip has Bluetooth Classic #define CHIP_FEATURE_IEEE802154 BIT(6) //!< Chip has IEEE 802.15.4 +#define CHIP_FEATURE_EMB_PSRAM BIT(7) //!< Chip has embedded psram /** * @brief The structure represents information about the chip diff --git a/components/esp_hw_support/port/esp32/chip_info.c b/components/esp_hw_support/port/esp32/chip_info.c index 2c26e10488..231b8bb8d4 100644 --- a/components/esp_hw_support/port/esp32/chip_info.c +++ b/components/esp_hw_support/port/esp32/chip_info.c @@ -34,6 +34,9 @@ void esp_chip_info(esp_chip_info_t* out_info) package == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) { out_info->features |= CHIP_FEATURE_EMB_FLASH; } + if(package == EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3) { + out_info->features |= CHIP_FEATURE_EMB_PSRAM; + } } #if CONFIG_ESP32_ECO3_CACHE_LOCK_FIX diff --git a/components/esp_hw_support/port/esp32/spiram_psram.c b/components/esp_hw_support/port/esp32/spiram_psram.c index 19bd6d92e7..35ca3b90e7 100644 --- a/components/esp_hw_support/port/esp32/spiram_psram.c +++ b/components/esp_hw_support/port/esp32/spiram_psram.c @@ -111,6 +111,11 @@ typedef enum { #define D2WD_PSRAM_CLK_IO CONFIG_D2WD_PSRAM_CLK_IO // Default value is 9 #define D2WD_PSRAM_CS_IO CONFIG_D2WD_PSRAM_CS_IO // Default value is 10 +// There is no reason to change the pin of an embedded psram. +// So define the number of pin directly, instead of configurable. +#define D0WDR2_V3_PSRAM_CLK_IO 6 +#define D0WDR2_V3_PSRAM_CS_IO 16 + // For ESP32-PICO chip, the psram share clock with flash. The flash clock pin is fixed, which is IO6. #define PICO_PSRAM_CLK_IO 6 #define PICO_PSRAM_CS_IO CONFIG_PICO_PSRAM_CS_IO // Default value is 10 @@ -842,6 +847,16 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad ESP_EARLY_LOGI(TAG, "This chip is ESP32-D0WD"); psram_io.psram_clk_io = D0WD_PSRAM_CLK_IO; psram_io.psram_cs_io = D0WD_PSRAM_CS_IO; + } else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3){ + ESP_EARLY_LOGI(TAG, "This chip is ESP32-D0WDR2-V3"); + rtc_vddsdio_config_t cfg = rtc_vddsdio_get_config(); + if (cfg.tieh != RTC_VDDSDIO_TIEH_3_3V) { + ESP_EARLY_LOGE(TAG, "VDDSDIO is not 3.3V"); + return ESP_FAIL; + } + s_clk_mode = PSRAM_CLK_MODE_NORM; + psram_io.psram_clk_io = D0WDR2_V3_PSRAM_CLK_IO; + psram_io.psram_cs_io = D0WDR2_V3_PSRAM_CS_IO; } else { ESP_EARLY_LOGE(TAG, "Not a valid or known package id: %d", pkg_ver); abort(); diff --git a/components/soc/esp32/include/soc/efuse_reg.h b/components/soc/esp32/include/soc/efuse_reg.h index 937585d9ba..77e3b8db96 100644 --- a/components/soc/esp32/include/soc/efuse_reg.h +++ b/components/soc/esp32/include/soc/efuse_reg.h @@ -1,16 +1,8 @@ -// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD -// -// Licensed under the Apache License, Version 2.0 (the "License"); -// you may not use this file except in compliance with the License. -// You may obtain a copy of the License at - -// http://www.apache.org/licenses/LICENSE-2.0 -// -// Unless required by applicable law or agreed to in writing, software -// distributed under the License is distributed on an "AS IS" BASIS, -// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -// See the License for the specific language governing permissions and -// limitations under the License. +/* + * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ #ifndef _SOC_EFUSE_REG_H_ #define _SOC_EFUSE_REG_H_ @@ -116,6 +108,7 @@ #define EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH 4 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 5 #define EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302 6 +#define EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3 7 /* EFUSE_RD_SPI_PAD_CONFIG_HD : RO ;bitpos:[8:4] ;default: 5'b0 ; */ /*description: read for SPI_pad_config_hd*/ #define EFUSE_RD_SPI_PAD_CONFIG_HD 0x0000001F diff --git a/tools/ci/check_copyright_ignore.txt b/tools/ci/check_copyright_ignore.txt index 9321876f3c..9c0e56a5f6 100644 --- a/tools/ci/check_copyright_ignore.txt +++ b/tools/ci/check_copyright_ignore.txt @@ -1806,7 +1806,6 @@ components/soc/esp32/include/soc/clkout_channel.h components/soc/esp32/include/soc/dac_channel.h components/soc/esp32/include/soc/dport_access.h components/soc/esp32/include/soc/dport_reg.h -components/soc/esp32/include/soc/efuse_reg.h components/soc/esp32/include/soc/emac_dma_struct.h components/soc/esp32/include/soc/emac_ext_struct.h components/soc/esp32/include/soc/emac_mac_struct.h