diff --git a/components/bootloader_support/src/bootloader_clock_init.c b/components/bootloader_support/src/bootloader_clock_init.c index c5f276304d..075f2c9f0b 100644 --- a/components/bootloader_support/src/bootloader_clock_init.c +++ b/components/bootloader_support/src/bootloader_clock_init.c @@ -95,8 +95,8 @@ __attribute__((weak)) void bootloader_clock_configure(void) CLEAR_PERI_REG_MASK(LP_TIMER_LP_INT_ENA_REG, LP_TIMER_MAIN_TIMER_LP_INT_ENA); /* MAIN_TIMER */ CLEAR_PERI_REG_MASK(LP_ANALOG_PERI_LP_ANA_LP_INT_ENA_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE0_LP_INT_ENA); /* BROWN_OUT */ CLEAR_PERI_REG_MASK(LP_WDT_INT_ENA_REG, LP_WDT_LP_WDT_INT_ENA); /* WDT */ - // CLEAR_PERI_REG_MASK(PMU_HP_INT_ENA_REG, PMU_SOC_WAKEUP_INT_ENA); // TODO: IDF-5348 /* SLP_REJECT */ - // CLEAR_PERI_REG_MASK(PMU_SOC_SLEEP_REJECT_INT_ENA, PMU_SOC_SLEEP_REJECT_INT_ENA); /* SLP_WAKEUP */ + CLEAR_PERI_REG_MASK(PMU_HP_INT_ENA_REG, PMU_SOC_WAKEUP_INT_ENA); /* SLP_REJECT */ + CLEAR_PERI_REG_MASK(PMU_HP_INT_ENA_REG, PMU_SOC_SLEEP_REJECT_INT_ENA); /* SLP_WAKEUP */ // SET CLR SET_PERI_REG_MASK(LP_WDT_INT_CLR_REG, LP_WDT_SUPER_WDT_INT_CLR); /* SWD */ SET_PERI_REG_MASK(LP_TIMER_LP_INT_CLR_REG, LP_TIMER_MAIN_TIMER_LP_INT_CLR); /* MAIN_TIMER */ @@ -108,13 +108,13 @@ __attribute__((weak)) void bootloader_clock_configure(void) CLEAR_PERI_REG_MASK(LP_ANALOG_PERI_LP_ANA_LP_INT_ENA_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE0_LP_INT_ENA); /* BROWN_OUT */ CLEAR_PERI_REG_MASK(LP_WDT_INT_ENA_REG, LP_WDT_LP_WDT_INT_ENA); /* WDT */ CLEAR_PERI_REG_MASK(PMU_HP_INT_ENA_REG, PMU_SOC_WAKEUP_INT_ENA); /* SLP_REJECT */ - CLEAR_PERI_REG_MASK(PMU_SOC_SLEEP_REJECT_INT_ENA, PMU_SOC_SLEEP_REJECT_INT_ENA); /* SLP_WAKEUP */ + CLEAR_PERI_REG_MASK(PMU_HP_INT_ENA_REG, PMU_SOC_SLEEP_REJECT_INT_ENA); /* SLP_WAKEUP */ // SET CLR SET_PERI_REG_MASK(LP_WDT_INT_CLR_REG, LP_WDT_SUPER_WDT_INT_CLR); /* SWD */ SET_PERI_REG_MASK(LP_ANALOG_PERI_LP_ANA_LP_INT_CLR_REG, LP_ANALOG_PERI_LP_ANA_BOD_MODE0_LP_INT_CLR); /* BROWN_OUT */ SET_PERI_REG_MASK(LP_WDT_INT_CLR_REG, LP_WDT_LP_WDT_INT_CLR); /* WDT */ - // SET_PERI_REG_MASK(PMU_HP_INT_CLR_REG, PMU_SOC_WAKEUP_INT_CLR); // TODO: IDF-5348 /* SLP_REJECT */ - // SET_PERI_REG_MASK(PMU_SOC_SLEEP_REJECT_INT_CLR, PMU_SOC_SLEEP_REJECT_INT_CLR); /* SLP_WAKEUP */ + SET_PERI_REG_MASK(PMU_HP_INT_CLR_REG, PMU_SOC_WAKEUP_INT_CLR); /* SLP_REJECT */ + SET_PERI_REG_MASK(PMU_SOC_SLEEP_REJECT_INT_CLR, PMU_SOC_SLEEP_REJECT_INT_CLR); /* SLP_WAKEUP */ #else REG_WRITE(RTC_CNTL_INT_ENA_REG, 0); REG_WRITE(RTC_CNTL_INT_CLR_REG, UINT32_MAX); diff --git a/components/esp_hw_support/port/esp32c6/rtc_sleep.c b/components/esp_hw_support/port/esp32c6/rtc_sleep.c deleted file mode 100644 index 8a5daa4517..0000000000 --- a/components/esp_hw_support/port/esp32c6/rtc_sleep.c +++ /dev/null @@ -1,7 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -// TODO: IDF-5645 diff --git a/components/esp_hw_support/sleep_modes.c b/components/esp_hw_support/sleep_modes.c index 7d77e772d9..61e8b6084b 100644 --- a/components/esp_hw_support/sleep_modes.c +++ b/components/esp_hw_support/sleep_modes.c @@ -1312,9 +1312,7 @@ esp_sleep_wakeup_cause_t esp_sleep_get_wakeup_cause(void) return ESP_SLEEP_WAKEUP_UNDEFINED; } -#ifdef CONFIG_IDF_TARGET_ESP32 - uint32_t wakeup_cause = REG_GET_FIELD(RTC_CNTL_WAKEUP_STATE_REG, RTC_CNTL_WAKEUP_CAUSE); -#elif SOC_PMU_SUPPORTED +#if SOC_PMU_SUPPORTED uint32_t wakeup_cause = pmu_ll_hp_get_wakeup_cause(&PMU); #else uint32_t wakeup_cause = rtc_cntl_ll_get_wakeup_cause(); diff --git a/components/esp_hw_support/sleep_wake_stub.c b/components/esp_hw_support/sleep_wake_stub.c index ba0c411de8..023e766c45 100644 --- a/components/esp_hw_support/sleep_wake_stub.c +++ b/components/esp_hw_support/sleep_wake_stub.c @@ -23,6 +23,11 @@ #else #include "hal/rtc_cntl_ll.h" #endif + +#if SOC_PMU_SUPPORTED +#include "hal/pmu_ll.h" +#endif + #include "sdkconfig.h" #include "esp_rom_uart.h" #include "esp_rom_sys.h" @@ -62,7 +67,12 @@ void RTC_IRAM_ATTR esp_wake_stub_sleep(esp_deep_sleep_wake_stub_fn_t new_stub) #endif // SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_MEM // Go to sleep. +#if SOC_PMU_SUPPORTED + pmu_ll_hp_set_sleep_enable(&PMU); +#else rtc_cntl_ll_sleep_enable(); +#endif + // A few CPU cycles may be necessary for the sleep to start... while (true) {}; // never reaches here. @@ -89,5 +99,9 @@ void RTC_IRAM_ATTR esp_wake_stub_set_wakeup_time(uint64_t time_in_us) uint32_t RTC_IRAM_ATTR esp_wake_stub_get_wakeup_cause(void) { +#if SOC_PMU_SUPPORTED + return pmu_ll_hp_get_wakeup_cause(&PMU); +#else return rtc_cntl_ll_get_wakeup_cause(); +#endif } diff --git a/components/hal/esp32c6/include/hal/rtc_cntl_ll.h b/components/hal/esp32c6/include/hal/rtc_cntl_ll.h deleted file mode 100644 index 25a1f55372..0000000000 --- a/components/hal/esp32c6/include/hal/rtc_cntl_ll.h +++ /dev/null @@ -1,89 +0,0 @@ -/* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD - * - * SPDX-License-Identifier: Apache-2.0 - */ - -#pragma once - -#include "soc/soc.h" -#include "soc/rtc.h" -#include "soc/lp_aon_reg.h" -#include "esp_attr.h" - -#ifdef __cplusplus -extern "C" { -#endif - -FORCE_INLINE_ATTR void rtc_cntl_ll_set_wakeup_timer(uint64_t t) -{ - // TODO: IDF-5645 -} - -FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_gpio_get_wakeup_status(void) -{ - // TODO: IDF-5645 - return 0; -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_gpio_clear_wakeup_status(void) -{ - // TODO: IDF-5645 -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_set_cpu_retention_link_addr(uint32_t addr) -{ - // TODO: IDF-5718 has removed the retention feature -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_enable_cpu_retention_clock(void) -{ - // TODO: IDF-5718 has removed the retention feature -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_enable_cpu_retention(void) -{ - // TODO: IDF-5718 has removed the retention feature -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_disable_cpu_retention(void) -{ - // TODO: IDF-5718 has removed the retention feature -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_reset_system(void) -{ - REG_SET_BIT(LP_AON_SYS_CFG_REG, LP_AON_HPSYS_SW_RESET); -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_reset_cpu(int cpu_no) -{ - REG_SET_BIT(LP_AON_CPUCORE0_CFG_REG, LP_AON_CPU_CORE0_SW_RESET); -} - -FORCE_INLINE_ATTR void rtc_cntl_ll_sleep_enable(void) -{ - // TODO: IDF-6064 -} - -FORCE_INLINE_ATTR uint64_t rtc_cntl_ll_get_rtc_time(void) -{ - // TODO: IDF-6064 - return 0; -} - -FORCE_INLINE_ATTR uint64_t rtc_cntl_ll_time_to_count(uint64_t time_in_us) -{ - // TODO: IDF-6064 - return 0; -} - -FORCE_INLINE_ATTR uint32_t rtc_cntl_ll_get_wakeup_cause(void) -{ - // TODO: IDF-6064 - return 0; -} - -#ifdef __cplusplus -} -#endif diff --git a/components/soc/esp32c6/include/soc/rtc.h b/components/soc/esp32c6/include/soc/rtc.h index 000f15b1e8..dc4fd5339e 100644 --- a/components/soc/esp32c6/include/soc/rtc.h +++ b/components/soc/esp32c6/include/soc/rtc.h @@ -17,7 +17,7 @@ extern "C" { /** * @file rtc.h - * @brief Low-level RTC power, clock, and sleep functions. + * @brief Low-level RTC power, clock functions. * * Functions in this file facilitate configuration of ESP32's RTC_CNTL peripheral. * RTC_CNTL peripheral handles many functions: @@ -514,164 +514,8 @@ bool rtc_dig_8m_enabled(void); */ uint32_t rtc_clk_freq_cal(uint32_t cal_val); -/** - * @brief Power down flags for rtc_sleep_pd function - */ -typedef struct { - uint32_t dig_fpu : 1; //!< Set to 1 to power UP digital part in sleep - uint32_t rtc_fpu : 1; //!< Set to 1 to power UP RTC memories in sleep - uint32_t cpu_fpu : 1; //!< Set to 1 to power UP digital memories and CPU in sleep - uint32_t i2s_fpu : 1; //!< Set to 1 to power UP I2S in sleep - uint32_t bb_fpu : 1; //!< Set to 1 to power UP WiFi in sleep - uint32_t nrx_fpu : 1; //!< Set to 1 to power UP WiFi in sleep - uint32_t fe_fpu : 1; //!< Set to 1 to power UP WiFi in sleep - uint32_t sram_fpu : 1; //!< Set to 1 to power UP SRAM in sleep - uint32_t rom_ram_fpu : 1; //!< Set to 1 to power UP ROM/IRAM0_DRAM0 in sleep -} rtc_sleep_pu_config_t; - -/** - * Initializer for rtc_sleep_pu_config_t which sets all flags to the same value - */ -#define RTC_SLEEP_PU_CONFIG_ALL(val) {\ - .dig_fpu = (val), \ - .rtc_fpu = (val), \ - .cpu_fpu = (val), \ - .i2s_fpu = (val), \ - .bb_fpu = (val), \ - .nrx_fpu = (val), \ - .fe_fpu = (val), \ - .sram_fpu = (val), \ - .rom_ram_fpu = (val), \ -} - -void rtc_sleep_pu(rtc_sleep_pu_config_t cfg); - -/** - * @brief sleep configuration for rtc_sleep_init function - */ -typedef struct { - uint32_t lslp_mem_inf_fpu : 1; //!< force normal voltage in sleep mode (digital domain memory) - uint32_t rtc_mem_inf_follow_cpu : 1;//!< keep low voltage in sleep mode (even if ULP/touch is used) - uint32_t rtc_fastmem_pd_en : 1; //!< power down RTC fast memory - uint32_t rtc_slowmem_pd_en : 1; //!< power down RTC slow memory - uint32_t rtc_peri_pd_en : 1; //!< power down RTC peripherals - uint32_t wifi_pd_en : 1; //!< power down WiFi - uint32_t bt_pd_en : 1; //!< power down BT - uint32_t cpu_pd_en : 1; //!< power down CPU, but not restart when lightsleep. - uint32_t int_8m_pd_en : 1; //!< Power down Internal 8M oscillator - uint32_t dig_peri_pd_en : 1; //!< power down digital peripherals - uint32_t deep_slp : 1; //!< power down digital domain - uint32_t wdt_flashboot_mod_en : 1; //!< enable WDT flashboot mode - uint32_t dig_dbias_wak : 5; //!< set bias for digital domain, in active mode - uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode - uint32_t rtc_dbias_wak : 5; //!< set bias for RTC domain, in active mode - uint32_t rtc_dbias_slp : 5; //!< set bias for RTC domain, in sleep mode - uint32_t dbg_atten_monitor : 4; //!< voltage parameter, in monitor mode - uint32_t bias_sleep_monitor : 1; //!< circuit control parameter, in monitor mode - uint32_t dbg_atten_slp : 4; //!< voltage parameter, in sleep mode - uint32_t bias_sleep_slp : 1; //!< circuit control parameter, in sleep mode - uint32_t pd_cur_monitor : 1; //!< circuit control parameter, in monitor mode - uint32_t pd_cur_slp : 1; //!< circuit control parameter, in sleep mode - uint32_t vddsdio_pd_en : 1; //!< power down VDDSDIO regulator - uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep - uint32_t deep_slp_reject : 1; //!< enable deep sleep reject - uint32_t light_slp_reject : 1; //!< enable light sleep reject -} rtc_sleep_config_t; -/** - * Default initializer for rtc_sleep_config_t - * - * This initializer sets all fields to "reasonable" values (e.g. suggested for - * production use) based on a combination of RTC_SLEEP_PD_x flags. - * - * @param RTC_SLEEP_PD_x flags combined using bitwise OR - */ -void rtc_sleep_get_default_config(uint32_t sleep_flags, rtc_sleep_config_t *out_config); - -/** - * @brief Prepare the chip to enter sleep mode - * - * This function configures various power control state machines to handle - * entry into light sleep or deep sleep mode, switches APB and CPU clock source - * (usually to XTAL), and sets bias voltages for digital and RTC power domains. - * - * This function does not actually enter sleep mode; this is done using - * rtc_sleep_start function. Software may do some other actions between - * rtc_sleep_init and rtc_sleep_start, such as set wakeup timer and configure - * wakeup sources. - * @param cfg sleep mode configuration - */ -void rtc_sleep_init(rtc_sleep_config_t cfg); - -/** - * @brief Low level initialize for rtc state machine waiting cycles after waking up - * - * This function configures the cycles chip need to wait for internal 8MHz - * oscillator and external 40MHz crystal. As we configure fixed time for waiting - * crystal, we need to pass period to calculate cycles. Now this function only - * used in lightsleep mode. - * - * @param slowclk_period re-calibrated slow clock period - */ -void rtc_sleep_low_init(uint32_t slowclk_period); - -/** - * @brief Set target value of RTC counter for RTC_TIMER_TRIG_EN wakeup source - * @param t value of RTC counter at which wakeup from sleep will happen; - * only the lower 48 bits are used - */ -void rtc_sleep_set_wakeup_time(uint64_t t); - -/** - * @brief Enter deep or light sleep mode - * - * This function enters the sleep mode previously configured using rtc_sleep_init - * function. Before entering sleep, software should configure wake up sources - * appropriately (set up GPIO wakeup registers, timer wakeup registers, - * and so on). - * - * If deep sleep mode was configured using rtc_sleep_init, and sleep is not - * rejected by hardware (based on reject_opt flags), this function never returns. - * When the chip wakes up from deep sleep, CPU is reset and execution starts - * from ROM bootloader. - * - * If light sleep mode was configured using rtc_sleep_init, this function - * returns on wakeup, or if sleep is rejected by hardware. - * - * @param wakeup_opt bit mask wake up reasons to enable (RTC_xxx_TRIG_EN flags - * combined with OR) - * @param reject_opt bit mask of sleep reject reasons: - * - RTC_CNTL_GPIO_REJECT_EN - * - RTC_CNTL_SDIO_REJECT_EN - * These flags are used to prevent entering sleep when e.g. - * an external host is communicating via SDIO slave - * @return non-zero if sleep was rejected by hardware - */ -uint32_t rtc_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt, uint32_t lslp_mem_inf_fpu); - -/** - * @brief Enter deep sleep mode - * - * Similar to rtc_sleep_start(), but additionally uses hardware to calculate the CRC value - * of RTC FAST memory. On wake, this CRC is used to determine if a deep sleep wake - * stub is valid to execute (if a wake address is set). - * - * No RAM is accessed while calculating the CRC and going into deep sleep, which makes - * this function safe to use even if the caller's stack is in RTC FAST memory. - * - * @note If no deep sleep wake stub address is set then calling rtc_sleep_start() will - * have the same effect and takes less time as CRC calculation is skipped. - * - * @note This function should only be called after rtc_sleep_init() has been called to - * configure the system for deep sleep. - * - * @param wakeup_opt - same as for rtc_sleep_start - * @param reject_opt - same as for rtc_sleep_start - * - * @return non-zero if sleep was rejected by hardware - */ -uint32_t rtc_deep_sleep_start(uint32_t wakeup_opt, uint32_t reject_opt); /** * RTC power and clock control initialization settings