kopia lustrzana https://github.com/espressif/esp-idf
fix(ulp-risc-v): Set RTC GPIO output mode in the correct register for ULP RISC-V
According to the ESP32-S2/S3 TRM, the output pin's mode is set in the RTC_GPIO_PINn_REG by programming the RTC_GPIO_PINn_PAD_DRIVER bit. The current ULP RISC-V RTCIO driver however, incorrectly programs the RTC_IO_TOUCH_PADn_REG register field RTC_IO_TOUCH_PADn_DRV. This commit fixes the bug.pull/14633/head
rodzic
c00dad83c1
commit
cd7b8f2db1
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@ -96,7 +96,7 @@ static inline uint8_t ulp_riscv_gpio_get_level(gpio_num_t gpio_num)
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static inline void ulp_riscv_gpio_set_output_mode(gpio_num_t gpio_num, rtc_io_out_mode_t mode)
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{
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REG_SET_FIELD(RTC_IO_TOUCH_PAD0_REG + gpio_num*4, RTC_IO_TOUCH_PAD0_DRV, mode);
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REG_SET_FIELD(RTC_GPIO_PIN0_REG + gpio_num * 4, RTC_GPIO_PIN0_PAD_DRIVER, mode);
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}
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static inline void ulp_riscv_gpio_pullup(gpio_num_t gpio_num)
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