kopia lustrzana https://github.com/espressif/esp-idf
adc: apply adc power API to adc driver
Closes https://github.com/espressif/esp-idf/issues/6269 Closes https://github.com/espressif/esp-idf/issues/6682pull/6828/head
Armando
rodzic
1dfa0e0aa1
commit
cc6bfcd9ac
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@ -177,7 +177,11 @@ void adc_power_on(void)
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static void adc_power_off_internal(void)
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{
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#if CONFIG_IDF_TARGET_ESP32
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adc_hal_set_power_manage(ADC_POWER_SW_OFF);
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#else
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adc_hal_set_power_manage(ADC_POWER_BY_FSM);
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#endif
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}
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void adc_power_release(void)
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@ -135,6 +135,7 @@ esp_err_t adc_digi_init(void)
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esp_err_t adc_digi_deinit(void)
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{
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adc_power_release();
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ADC_ENTER_CRITICAL();
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adc_hal_digi_deinit();
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ADC_EXIT_CRITICAL();
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@ -143,6 +144,8 @@ esp_err_t adc_digi_deinit(void)
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esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
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{
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/* If enable digital controller, adc xpd should always on. */
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adc_power_acquire();
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ADC_ENTER_CRITICAL();
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adc_hal_digi_controller_config(config);
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ADC_EXIT_CRITICAL();
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@ -287,6 +287,7 @@ esp_err_t adc_digi_start(void)
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ESP_LOGE(ADC_TAG, "The driver is already started");
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return ESP_ERR_INVALID_STATE;
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}
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adc_power_acquire();
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//reset flags
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s_adc_digi_ctx->ringbuf_overflow_flag = 0;
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s_adc_digi_ctx->driver_start_flag = 1;
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@ -356,6 +357,7 @@ esp_err_t adc_digi_stop(void)
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if (s_adc_digi_ctx->use_adc2) {
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SAR_ADC2_LOCK_RELEASE();
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}
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adc_power_release();
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return ESP_OK;
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}
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@ -450,7 +452,7 @@ esp_err_t adc_vref_to_gpio(adc_unit_t adc_unit, gpio_num_t gpio)
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}
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}
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adc_hal_set_power_manage(ADC_POWER_SW_ON);
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adc_power_acquire();
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if (adc_unit & ADC_UNIT_1) {
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ADC_ENTER_CRITICAL();
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adc_hal_vref_output(ADC_NUM_1, channel, true);
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@ -495,6 +497,7 @@ int adc1_get_raw(adc1_channel_t channel)
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int raw_out = 0;
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periph_module_enable(PERIPH_SARADC_MODULE);
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adc_power_acquire();
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SAR_ADC1_LOCK_ACQUIRE();
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@ -503,14 +506,13 @@ int adc1_get_raw(adc1_channel_t channel)
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adc_hal_set_calibration_param(ADC_NUM_1, cal_val);
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ADC_REG_LOCK_ENTER();
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adc_hal_set_power_manage(ADC_POWER_SW_ON);
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adc_hal_set_atten(ADC_NUM_2, channel, atten);
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adc_hal_convert(ADC_NUM_1, channel, &raw_out);
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adc_hal_set_power_manage(ADC_POWER_BY_FSM);
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ADC_REG_LOCK_EXIT();
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SAR_ADC1_LOCK_RELEASE();
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adc_power_release();
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periph_module_disable(PERIPH_SARADC_MODULE);
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return raw_out;
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@ -540,6 +542,7 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
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esp_err_t ret = ESP_OK;
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periph_module_enable(PERIPH_SARADC_MODULE);
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adc_power_acquire();
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SAR_ADC2_LOCK_ACQUIRE();
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@ -548,14 +551,13 @@ esp_err_t adc2_get_raw(adc2_channel_t channel, adc_bits_width_t width_bit, int *
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adc_hal_set_calibration_param(ADC_NUM_2, cal_val);
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ADC_REG_LOCK_ENTER();
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adc_hal_set_power_manage(ADC_POWER_SW_ON);
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adc_hal_set_atten(ADC_NUM_2, channel, atten);
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ret = adc_hal_convert(ADC_NUM_2, channel, raw_out);
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adc_hal_set_power_manage(ADC_POWER_BY_FSM);
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ADC_REG_LOCK_EXIT();
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SAR_ADC2_LOCK_RELEASE();
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adc_power_release();
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periph_module_disable(PERIPH_SARADC_MODULE);
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return ret;
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@ -89,6 +89,7 @@ esp_err_t adc_digi_deinit(void)
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s_adc_digi_arbiter_lock = NULL;
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}
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#endif
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adc_power_release();
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ADC_ENTER_CRITICAL();
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adc_hal_digi_deinit();
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ADC_EXIT_CRITICAL();
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@ -124,6 +125,8 @@ esp_err_t adc_digi_controller_config(const adc_digi_config_t *config)
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}
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}
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/* If enable digtal controller, adc xpd should always on. */
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adc_power_acquire();
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ADC_ENTER_CRITICAL();
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adc_hal_digi_controller_config(config);
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ADC_EXIT_CRITICAL();
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@ -43,10 +43,6 @@ void adc_hal_init(void)
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adc_ll_digi_set_clk_div(SOC_ADC_DIGI_SAR_CLK_DIV_DEFAULT);
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}
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void adc_hal_deinit(void)
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{
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adc_ll_set_power_manage(ADC_POWER_SW_OFF);
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}
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/*---------------------------------------------------------------
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ADC calibration setting
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---------------------------------------------------------------*/
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@ -381,6 +377,8 @@ esp_err_t adc_hal_convert(adc_ll_num_t adc_n, int channel, int *out_raw)
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adc_hal_onetime_start();
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while (!adc_hal_intr_get_raw(event));
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ret = adc_hal_single_read(adc_n, out_raw);
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//HW workaround: when enabling periph clock, this should be false
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adc_ll_onetime_sample_enable(adc_n, false);
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return ret;
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}
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@ -22,13 +22,10 @@ void adc_hal_digi_deinit(void)
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{
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adc_ll_digi_clear_pattern_table(ADC_NUM_1);
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adc_ll_digi_clear_pattern_table(ADC_NUM_2);
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adc_hal_deinit();
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}
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void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
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{
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/* If enable digital controller, adc xpd should always on. */
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adc_ll_set_power_manage(ADC_POWER_SW_ON);
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/* Single channel mode or multi channel mode. */
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adc_ll_digi_set_convert_mode(cfg->conv_mode);
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if (cfg->conv_mode & ADC_CONV_SINGLE_UNIT_1) {
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@ -42,7 +42,6 @@ void adc_hal_digi_deinit(void)
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adc_ll_digi_filter_reset(ADC_NUM_2);
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adc_ll_digi_reset();
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adc_ll_digi_controller_clk_disable();
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adc_hal_deinit();
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}
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/**
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@ -62,8 +61,6 @@ void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
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//only one pattern table is supported on C3, but LL still needs one argument.
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const int pattern_both = 0;
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/* If enable digtal controller, adc xpd should always on. */
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adc_ll_set_power_manage(ADC_POWER_SW_ON);
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if (cfg->adc_pattern_len) {
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adc_ll_digi_clear_pattern_table(pattern_both);
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adc_ll_digi_set_pattern_table_len(pattern_both, cfg->adc_pattern_len);
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@ -33,13 +33,10 @@ void adc_hal_digi_deinit(void)
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adc_ll_digi_filter_reset(ADC_NUM_2);
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adc_ll_digi_reset();
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adc_ll_digi_controller_clk_disable();
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adc_hal_deinit();
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}
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void adc_hal_digi_controller_config(const adc_digi_config_t *cfg)
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{
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/* If enable digtal controller, adc xpd should always on. */
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adc_ll_set_power_manage(ADC_POWER_SW_ON);
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/* Single channel mode or multi channel mode. */
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adc_ll_digi_set_convert_mode(cfg->conv_mode);
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if (cfg->conv_mode & ADC_CONV_SINGLE_UNIT_1) {
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@ -61,11 +61,6 @@ typedef struct adc_hal_context_t {
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*/
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void adc_hal_init(void);
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/**
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* ADC module deinitialization.
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*/
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void adc_hal_deinit(void);
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/**
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* Set ADC module power management.
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*
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