efuse: Checks errors of 4x coding scheme for BLOCK0 if so then abort

pull/9338/head
KonstantinKondrashov 2021-08-11 19:06:48 +05:00
rodzic dcc706280d
commit c563d799fe
9 zmienionych plików z 77 dodań i 0 usunięć

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@ -118,6 +118,11 @@ void esp_efuse_utility_clear_program_registers(void)
efuse_hal_clear_program_registers(); efuse_hal_clear_program_registers();
} }
esp_err_t esp_efuse_utility_check_errors(void)
{
return ESP_OK;
}
// Burn values written to the efuse write registers // Burn values written to the efuse write registers
esp_err_t esp_efuse_utility_burn_chip(void) esp_err_t esp_efuse_utility_burn_chip(void)
{ {

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@ -120,6 +120,26 @@ void esp_efuse_utility_clear_program_registers(void)
ets_efuse_clear_program_registers(); ets_efuse_clear_program_registers();
} }
esp_err_t esp_efuse_utility_check_errors(void)
{
if (REG_GET_BIT(EFUSE_RD_REPEAT_DATA3_REG, EFUSE_ERR_RST_ENABLE)) {
for (unsigned i = 0; i < 5; i++) {
uint32_t error_reg = REG_READ(EFUSE_RD_REPEAT_ERR0_REG + i * 4);
if (error_reg) {
uint32_t data_reg = REG_READ(EFUSE_RD_REPEAT_DATA0_REG + i * 4);
if (error_reg & data_reg) {
// For 0001 situation (4x coding scheme):
// an error bit points that data bit is wrong in case the data bit equals 1. (need to reboot in this case).
ESP_EARLY_LOGE(TAG, "Error in EFUSE_RD_REPEAT_DATA%d_REG of BLOCK0 (error_reg=0x%08x, data_reg=0x%08x). Need to reboot", i, error_reg, data_reg);
efuse_read();
return ESP_FAIL;
}
}
}
}
return ESP_OK;
}
// Burn values written to the efuse write registers // Burn values written to the efuse write registers
esp_err_t esp_efuse_utility_burn_chip(void) esp_err_t esp_efuse_utility_burn_chip(void)
{ {

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@ -95,6 +95,11 @@ void esp_efuse_utility_clear_program_registers(void)
ets_efuse_clear_program_registers(); ets_efuse_clear_program_registers();
} }
esp_err_t esp_efuse_utility_check_errors(void)
{
return ESP_OK;
}
// Burn values written to the efuse write registers // Burn values written to the efuse write registers
esp_err_t esp_efuse_utility_burn_chip(void) esp_err_t esp_efuse_utility_burn_chip(void)
{ {

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@ -88,6 +88,11 @@ void esp_efuse_utility_clear_program_registers(void)
ets_efuse_clear_program_registers(); ets_efuse_clear_program_registers();
} }
esp_err_t esp_efuse_utility_check_errors(void)
{
return ESP_OK;
}
// Burn values written to the efuse write registers // Burn values written to the efuse write registers
esp_err_t esp_efuse_utility_burn_chip(void) esp_err_t esp_efuse_utility_burn_chip(void)
{ {

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@ -113,6 +113,11 @@ void esp_efuse_utility_clear_program_registers(void)
ets_efuse_clear_program_registers(); ets_efuse_clear_program_registers();
} }
esp_err_t esp_efuse_utility_check_errors(void)
{
return ESP_OK;
}
// Burn values written to the efuse write registers // Burn values written to the efuse write registers
esp_err_t esp_efuse_utility_burn_chip(void) esp_err_t esp_efuse_utility_burn_chip(void)
{ {

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@ -761,6 +761,20 @@ esp_err_t esp_efuse_write_keys(const esp_efuse_purpose_t purposes[], uint8_t key
esp_err_t esp_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys); esp_err_t esp_secure_boot_read_key_digests(ets_secure_boot_key_digests_t *trusted_keys);
#endif #endif
/**
* @brief Checks eFuse errors in BLOCK0.
*
* @note Refers to ESP32-C3 only.
*
* It does a BLOCK0 check if eFuse EFUSE_ERR_RST_ENABLE is set.
* If BLOCK0 has an error, it prints the error and returns ESP_FAIL, which should be treated as esp_restart.
*
* @return
* - ESP_OK: No errors in BLOCK0.
* - ESP_FAIL: Error in BLOCK0 requiring reboot.
*/
esp_err_t esp_efuse_check_errors(void);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

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@ -160,6 +160,20 @@ void esp_efuse_utility_erase_virt_blocks(void);
*/ */
esp_err_t esp_efuse_utility_apply_new_coding_scheme(void); esp_err_t esp_efuse_utility_apply_new_coding_scheme(void);
/**
* @brief Checks eFuse errors in BLOCK0.
*
* @note Refers to ESP32-C3 only.
*
* It does a BLOCK0 check if eFuse EFUSE_ERR_RST_ENABLE is set.
* If BLOCK0 has an error, it prints the error and returns ESP_FAIL, which should be treated as esp_restart.
*
* @return
* - ESP_OK: No errors in BLOCK0.
* - ESP_FAIL: Error in BLOCK0 requiring reboot.
*/
esp_err_t esp_efuse_utility_check_errors(void);
/** /**
* @brief Efuse read operation: copies data from physical efuses to efuse read registers. * @brief Efuse read operation: copies data from physical efuses to efuse read registers.
*/ */

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@ -287,3 +287,8 @@ esp_err_t esp_efuse_batch_write_commit(void)
} }
return ESP_OK; return ESP_OK;
} }
esp_err_t esp_efuse_check_errors(void)
{
return esp_efuse_utility_check_errors();
}

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@ -353,6 +353,10 @@ void IRAM_ATTR call_start_cpu0(void)
Cache_Resume_DCache(0); Cache_Resume_DCache(0);
#endif // CONFIG_IDF_TARGET_ESP32S3 #endif // CONFIG_IDF_TARGET_ESP32S3
if (esp_efuse_check_errors() != ESP_OK) {
esp_restart();
}
#if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2 #if CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32H2
/* Configure the Cache MMU size for instruction and rodata in flash. */ /* Configure the Cache MMU size for instruction and rodata in flash. */
extern uint32_t Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size); extern uint32_t Cache_Set_IDROM_MMU_Size(uint32_t irom_size, uint32_t drom_size);