kopia lustrzana https://github.com/espressif/esp-idf
Merge branch 'docs/update_cn_trans_ulp-risc-v_bootloader' into 'master'
Docs: update CN translation for ulp-risc-v.rst and bootloader.rst Closes DOC-5159 See merge request espressif/esp-idf!23644pull/11637/head
morris
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c176e05ae2
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@ -41,11 +41,11 @@ The bootloader does not support booting apps from older versions of ESP-IDF. Whe
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Bootloaders built from versions of ESP-IDF before V3.1 do not support MD5 checksums in the partition table binary. When using a bootloader from these ESP-IDF versions and building a new app, enable the config option :ref:`CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS`.
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Before ESP-IDF V5.1
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^^^^^^^^^^^^^^^^^^^
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Bootloaders built from versions of ESP-IDF prior to V5.1 do not support :ref:`CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM`. When using a bootloader from these ESP-IDF versions and building a new app you should not use this option.
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Bootloaders built from versions of ESP-IDF prior to V5.1 do not support :ref:`CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM`. When using a bootloader from these ESP-IDF versions and building a new app, you should not use this option.
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SPI Flash Configuration
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^^^^^^^^^^^^^^^^^^^^^^^
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@ -1,4 +1,4 @@
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ULP RISC-V Coprocessor programming
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ULP RISC-V Coprocessor Programming
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==================================
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:link_to_translation:`zh_CN:[中文]`
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@ -33,7 +33,7 @@ To compile the ULP RISC-V code as part of the component, the following steps mus
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ulp_embed_binary(${ulp_app_name} "${ulp_sources}" "${ulp_exp_dep_srcs}")
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The first argument to ``ulp_embed_binary`` specifies the ULP binary name. The name specified here will also be used by other generated artifacts such as the ELF file, map file, header file and linker export file. The second argument specifies the ULP source files. Finally, the third argument specifies the list of component source files which include the header file to be generated. This list is needed to build the dependencies correctly and ensure that the generated header file will be created before any of these files are compiled. See the section below for the concept of generated header files for ULP applications.
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The first argument to ``ulp_embed_binary`` specifies the ULP binary name. The name specified here will also be used by other generated artifacts such as the ELF file, map file, header file, and linker export file. The second argument specifies the ULP source files. Finally, the third argument specifies the list of component source files which include the header file to be generated. This list is needed to build the dependencies correctly and ensure that the generated header file will be created before any of these files are compiled. See the section below for the concept of generated header files for ULP applications.
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3. Build the application as usual (e.g., `idf.py app`).
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@ -68,7 +68,7 @@ For example, the ULP RISC-V program may define a variable ``measurement_count``
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int some_function()
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{
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//read the measurement count for use it later.
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//read the measurement count for later use.
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int temp = measurement_count;
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...do something.
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@ -138,7 +138,7 @@ Once the program is loaded into RTC memory, the application can start it by call
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ULP RISC-V Program Flow
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-----------------------
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{IDF_TARGET_RTC_CLK_FRE:default="150kHz", esp32s2="90kHz", esp32s3="136kHz"}
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{IDF_TARGET_RTC_CLK_FRE:default="150 kHz", esp32s2="90 kHz", esp32s3="136 kHz"}
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The ULP RISC-V coprocessor is started by a timer. The timer is started once :cpp:func:`ulp_riscv_run` is called. The timer counts the number of RTC_SLOW_CLK ticks (by default, produced by an internal {IDF_TARGET_RTC_CLK_FRE} RC oscillator). The number of ticks is set using ``RTC_CNTL_ULP_CP_TIMER_1_REG`` register. When starting the ULP, ``RTC_CNTL_ULP_CP_TIMER_1_REG`` will be used to set the number of timer ticks.
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@ -201,7 +201,7 @@ Application Examples
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* ULP RISC-V Coprocessor polls GPIO while main CPU is in deep sleep: :example:`system/ulp_riscv/gpio`.
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* ULP RISC-V Coprocessor uses bit-banged UART driver to print: :example:`system/ulp_riscv/uart_print`.
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* ULP RISC-V Coprocessor reads external temperature sensor while main CPU is in deep sleep: :example:`system/ulp_riscv/ds18b20_onewire`.
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* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in deep sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp_riscv/i2c`.
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* ULP RISC-V Coprocessor reads external I2C temperature and humidity sensor (BMP180) while the main CPU is in Deep-sleep and wakes up the main CPU once a threshold is met: :example:`system/ulp_riscv/i2c`.
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API Reference
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-------------
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@ -41,6 +41,12 @@ ESP-IDF 软件引导加载程序 (Bootloader) 主要执行以下任务：
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ESP-IDF V3.1 之前的版本构建的引导加载程序不支持分区表二进制文件中的 MD5 校验。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，请启用配置选项 :ref:`CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS`。
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ESP-IDF V5.1 之前的版本
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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ESP-IDF V5.1 之前的版本构建的引导加载程序不支持 :ref:`CONFIG_ESP_SYSTEM_ESP32_SRAM1_REGION_AS_IRAM`。使用这些 ESP-IDF 版本的引导加载程序并构建新应用程序时，不应使用该选项。
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配置 SPI Flash
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^^^^^^^^^^^^^^^^^^^^^^^
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@ -2,7 +2,7 @@ ULP RISC-V 协处理器编程
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==================================
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:link_to_translation:`en:[English]`
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ULP RISC-V 协处理器是 ULP 的一种变体，用于 {IDF_TARGET_NAME}。与 ULP FSM 类似，ULP RISC-V 协处理器可以在主处理器处于低功耗模式时执行传感器读数等任务。其与 ULP FSM 的主要区别在于，ULP RISC-V 可以通过标准 GNU 工具使用 C 语言进行编程。ULP RISC-V 可以访问 RTC_SLOW_MEM 内存区域及 RTC_CNTL、RTC_IO、SARADC 等外设的寄存器。RISC-V 处理器是一种 32 位定点处理器，指令集基于 RV32IMC，包括硬件乘除法和压缩指令。
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ULP RISC-V 协处理器是 ULP 的一种变体，用于 {IDF_TARGET_NAME}。与 ULP FSM 类似，ULP RISC-V 协处理器可以在主 CPU 处于低功耗模式时执行传感器读数等任务。其与 ULP FSM 的主要区别在于，ULP RISC-V 可以通过标准 GNU 工具使用 C 语言进行编程。ULP RISC-V 可以访问 RTC_SLOW_MEM 内存区域及 RTC_CNTL、RTC_IO、SARADC 等外设的寄存器。RISC-V 处理器是一种 32 位定点处理器，指令集基于 RV32IMC，包括硬件乘除法和压缩指令。
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安装 ULP RISC-V 工具链
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-----------------------------------
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@ -18,7 +18,7 @@ ULP RISC-V 协处理器代码以 C 语言（或汇编语言）编写，使用基
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要将 ULP RISC-V 代码编译为某组件的一部分，必须执行以下步骤：
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1. ULP RISC-V 代码以 C 语言或汇编语言编写（必须使用 `.S` 扩展名)，必须放在组件目录中一个独立的目录中，例如 `ulp/`。
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1. ULP RISC-V 代码以 C 语言或汇编语言编写（必须使用 `.S` 扩展名），必须放在组件目录中一个独立的目录中，例如 `ulp/`。
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.. note:: 当注册组件时（通过 ``idf_component_register``），该目录不应被添加至 ``SRC_DIRS`` 参数，因为目前该步骤需用于 ULP FSM。如何正确添加 ULP 源文件，请见以下步骤。
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@ -68,7 +68,7 @@ ULP RISC-V 协处理器代码以 C 语言（或汇编语言）编写，使用基
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int some_function()
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{
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//read the measurement count for use it later.
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//读取测量计数，后续需使用
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int temp = measurement_count;
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...do something.
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@ -138,7 +138,7 @@ ULP 中的所有硬件指令都不支持互斥，所以 Lock API 需通过一种
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ULP RISC-V 程序流
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-----------------------
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{IDF_TARGET_RTC_CLK_FRE:default="150kHz", esp32s2="90kHz", esp32s3="136kHz"}
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{IDF_TARGET_RTC_CLK_FRE:default="150 kHz", esp32s2="90 kHz", esp32s3="136 kHz"}
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ULP RISC-V 协处理器由定时器启动，调用 :cpp:func:`ulp_riscv_run` 即可启动定时器。定时器为 RTC_SLOW_CLK 的 Tick 事件计数（默认情况下，Tick 由内部 90 kHz RC 振荡器产生）。Tick 数值使用 ``RTC_CNTL_ULP_CP_TIMER_1_REG`` 寄存器设置。启用 ULP 时，使用 ``RTC_CNTL_ULP_CP_TIMER_1_REG`` 设置定时器 Tick 数值。
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@ -198,9 +198,10 @@ RTC I2C 控制器提供了在 RTC 电源域中作为 I2C 主机的功能。ULP R
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应用示例
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--------------------
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* 主处理器处于 Deep-sleep 状态时，ULP RISC-V 协处理器轮询 GPIO：:example:`system/ulp_riscv/gpio`。
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* ULP RISC-V 协处理器使用 bit-banged UART 驱动程序打印: :example:`system/ulp_riscv/uart_print`.
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* 主处理器处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部温度传感器：:example:`system/ulp_riscv/ds18b20_onewire`。
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* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器轮询 GPIO：:example:`system/ulp_riscv/gpio`。
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* ULP RISC-V 协处理器使用 bit-banged UART 驱动程序打印：:example:`system/ulp_riscv/uart_print`.
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* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部温度传感器：:example:`system/ulp_riscv/ds18b20_onewire`。
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* 主 CPU 处于 Deep-sleep 状态时，ULP RISC-V 协处理器读取外部 I2C 温度和湿度传感器 (BMP180)，达到阈值时唤醒主 CPU：:example:`system/ulp_riscv/i2c`.
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API 参考
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-------------
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